Initial commit: my SECS2 project
This commit is contained in:
247
usr/bsp/bsp_DS1302.c
Normal file
247
usr/bsp/bsp_DS1302.c
Normal file
@@ -0,0 +1,247 @@
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#include "bsp_DS1302.h"
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#define bsp_DS1302_DELAY() do{ \
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__NOP();__NOP();__NOP();__NOP();\
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__NOP();__NOP();__NOP();__NOP();\
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__NOP();__NOP();__NOP();__NOP();\
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__NOP();__NOP();__NOP();__NOP();\
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__NOP();__NOP();__NOP();__NOP();\
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__NOP();__NOP();__NOP();__NOP();\
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__NOP();__NOP();__NOP();__NOP();\
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}while(0)
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#define RST_CLR HAL_GPIO_WritePin(DS1302_RST_GPIO_Port, DS1302_RST_Pin, GPIO_PIN_RESET )
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#define RST_SET HAL_GPIO_WritePin(DS1302_RST_GPIO_Port, DS1302_RST_Pin, GPIO_PIN_SET )
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#define IO_CLR HAL_GPIO_WritePin(DS1302_DIO_GPIO_Port, DS1302_DIO_Pin, GPIO_PIN_RESET )
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#define IO_SET HAL_GPIO_WritePin(DS1302_DIO_GPIO_Port, DS1302_DIO_Pin, GPIO_PIN_SET )
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#define IO_READ HAL_GPIO_ReadPin (DS1302_DIO_GPIO_Port, DS1302_DIO_Pin )
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#define SCK_CLR HAL_GPIO_WritePin(DS1302_CLK_GPIO_Port, DS1302_CLK_Pin, GPIO_PIN_RESET )
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#define SCK_SET HAL_GPIO_WritePin(DS1302_CLK_GPIO_Port, DS1302_CLK_Pin, GPIO_PIN_SET )
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static void bsp_DS1302Init(void);
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static void bsp_DS1302_Task(void);
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static u8 bsp_DS1302_Set(bsp_DS1302_Time_t *pTime);
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bsp_DS1302_t DS1302 =
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{
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.Init = bsp_DS1302Init,
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.Task = bsp_DS1302_Task,
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.Set = bsp_DS1302_Set,
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};
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bsp_DS1302_t *pDS1302 = &DS1302;
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static void bsp_DS1302DataInput(void)
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{
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GPIO_InitTypeDef GPIO_InitStruct; //<2F><><EFBFBD><EFBFBD>GPIO<49>ṹ<EFBFBD><E1B9B9>
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GPIO_InitStruct.Pin = DS1302_DIO_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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HAL_GPIO_Init(DS1302_DIO_GPIO_Port, &GPIO_InitStruct);
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}
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static void bsp_DS1302DataOutput(void)
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{
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GPIO_InitTypeDef GPIO_InitStruct; //<2F><><EFBFBD><EFBFBD>GPIO<49>ṹ<EFBFBD><E1B9B9>
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GPIO_InitStruct.Pin = DS1302_DIO_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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HAL_GPIO_Init(DS1302_DIO_GPIO_Port, &GPIO_InitStruct);
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}
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/*<2A><>bsp_DS1302д<32><D0B4>һ<EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>*/
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static void bsp_DS1302_write_byte(u8 Addr, u8 Data)
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{
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u8 i;
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RST_SET; /*<2A><><EFBFBD><EFBFBD>bsp_DS1302<30><32><EFBFBD><EFBFBD>*/
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bsp_DS1302_DELAY();
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/*д<><D0B4>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>addr*/
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Addr = Addr & 0xFE;/*<2A><><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>*/
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for (i = 0; i < 8; i++)
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{
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if (Addr & 0x01)
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{
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IO_SET;
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}
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else
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{
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IO_CLR;
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}
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bsp_DS1302_DELAY();
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SCK_SET;
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bsp_DS1302_DELAY();
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SCK_CLR;
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bsp_DS1302_DELAY();
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Addr = Addr >> 1;
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}
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/*д<><D0B4><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD>d*/
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for (i = 0; i < 8; i++)
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{
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if (Data & 0x01)
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{
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IO_SET;
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}
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else
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{
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IO_CLR;
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}
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bsp_DS1302_DELAY();
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SCK_SET;
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bsp_DS1302_DELAY();
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SCK_CLR;
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bsp_DS1302_DELAY();
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Data = Data >> 1;
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}
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RST_CLR; /*ֹͣbsp_DS1302<30><32><EFBFBD><EFBFBD>*/
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bsp_DS1302_DELAY();
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}
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/*<2A><>bsp_DS1302<30><32><EFBFBD><EFBFBD>һ<EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>*/
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static u8 bsp_DS1302_read_byte(u8 Addr)
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{
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u8 i;
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u8 temp;
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RST_SET; /*<2A><><EFBFBD><EFBFBD>bsp_DS1302<30><32><EFBFBD><EFBFBD>*/
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bsp_DS1302_DELAY();
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/*д<><D0B4>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>addr*/
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Addr = Addr | 0x01;/*<2A><><EFBFBD><EFBFBD>λ<EFBFBD>ø<EFBFBD>*/
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for (i = 0; i < 8; i++)
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{
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if (Addr & 0x01)
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{
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IO_SET;
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}
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else
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{
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IO_CLR;
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}
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bsp_DS1302_DELAY();
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SCK_SET;
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bsp_DS1302_DELAY();
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SCK_CLR;
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bsp_DS1302_DELAY();
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Addr = Addr >> 1;
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}
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bsp_DS1302DataInput();
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/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD>temp*/
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for (i = 0; i < 8; i++)
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{
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temp = temp >> 1;
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if (IO_READ)
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{
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temp |= 0x80;
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}
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else
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{
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temp &= 0x7F;
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}
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bsp_DS1302_DELAY();
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SCK_SET;
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bsp_DS1302_DELAY();
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SCK_CLR;
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bsp_DS1302_DELAY();
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}
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RST_CLR; /*ֹͣbsp_DS1302<30><32><EFBFBD><EFBFBD>*/
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bsp_DS1302_DELAY();
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bsp_DS1302DataOutput();
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return temp;
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}
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static u8 HexToBCD(u8 code)
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{
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u8 temp;
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temp = ((code / 10) << 4) + (code % 10);
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return temp;
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}
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static u8 bsp_DS1302_Set(bsp_DS1302_Time_t *pTime)
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{
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if ((pTime->Year > 99) || (pTime->Month > 12) || (pTime->Day > 31) ||
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(pTime->Hour > 23) || (pTime->Minute > 59) || (pTime->Second > 59))
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{
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return USR_FALSE;
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}
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else
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{
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bsp_DS1302_write_byte(BSP_DS1302_CONTROL_ADDR, 0x00); //<2F>ر<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>
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bsp_DS1302_write_byte(BSP_DS1302_SEC_ADDR, 0x80); //<2F><>ͣ
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bsp_DS1302_write_byte(BSP_DS1302_YEAR_ADDR, HexToBCD(pTime->Year));
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bsp_DS1302_write_byte(BSP_DS1302_MONTH_ADDR, HexToBCD(pTime->Month));
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bsp_DS1302_write_byte(BSP_DS1302_DATA_ADDR, HexToBCD(pTime->Day));
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bsp_DS1302_write_byte(BSP_DS1302_HOUR_ADDR, HexToBCD(pTime->Hour));
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bsp_DS1302_write_byte(BSP_DS1302_MIN_ADDR, HexToBCD(pTime->Minute));
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bsp_DS1302_write_byte(BSP_DS1302_SEC_ADDR, HexToBCD(pTime->Second));
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bsp_DS1302_write_byte(BSP_DS1302_CONTROL_ADDR, 0x80); //<2F><><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>
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return USR_TRUE;
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}
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}
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static void bsp_DS1302_Task(void)
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{
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u8 RegData;
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RegData = bsp_DS1302_read_byte(BSP_DS1302_YEAR_ADDR);
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pDS1302->Time.Year = (RegData / 16) * 10 + RegData % 16;
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RegData = bsp_DS1302_read_byte(BSP_DS1302_MONTH_ADDR);
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pDS1302->Time.Month = (RegData / 16) * 10 + RegData % 16;
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RegData = bsp_DS1302_read_byte(BSP_DS1302_DATA_ADDR);
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pDS1302->Time.Day = (RegData / 16) * 10 + RegData % 16;
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RegData = bsp_DS1302_read_byte(BSP_DS1302_HOUR_ADDR);
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pDS1302->Time.Hour = (RegData / 16) * 10 + RegData % 16;
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RegData = bsp_DS1302_read_byte(BSP_DS1302_MIN_ADDR);
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pDS1302->Time.Minute = (RegData / 16) * 10 + RegData % 16;
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RegData = bsp_DS1302_read_byte(BSP_DS1302_SEC_ADDR);
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pDS1302->Time.Second = (RegData / 16) * 10 + RegData % 16;
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}
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static void bsp_DS1302Init(void)
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{
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RST_SET;
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SCK_CLR;
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bsp_DS1302_Task();
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if ((pDS1302->Time.Year > 99) || (pDS1302->Time.Month > 12) || (pDS1302->Time.Day > 31) ||
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(pDS1302->Time.Hour > 23) || (pDS1302->Time.Minute > 59) || (pDS1302->Time.Second > 59))
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{
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pDS1302->Time.Year = 25;
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pDS1302->Time.Month = 1;
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pDS1302->Time.Day = 1;
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pDS1302->Time.Hour = 0;
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pDS1302->Time.Minute = 0;
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pDS1302->Time.Second = 0;
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bsp_DS1302_Set(&pDS1302->Time);
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}
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}
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206
usr/bsp/bsp_DS1302.c.orig
Normal file
206
usr/bsp/bsp_DS1302.c.orig
Normal file
@@ -0,0 +1,206 @@
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#include "bsp_DS1302.h"
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#define bsp_DS1302_DELAY() do{ \
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__NOP();__NOP();__NOP();__NOP();\
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__NOP();__NOP();__NOP();__NOP();\
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__NOP();__NOP();__NOP();__NOP();\
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__NOP();__NOP();__NOP();__NOP();\
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__NOP();__NOP();__NOP();__NOP();\
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}while(0)
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#define RST_CLR HAL_GPIO_WritePin(DS1302_RST_GPIO_Port, DS1302_RST_Pin, GPIO_PIN_RESET )
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#define RST_SET HAL_GPIO_WritePin(DS1302_RST_GPIO_Port, DS1302_RST_Pin, GPIO_PIN_SET )
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#define IO_CLR HAL_GPIO_WritePin(DS1302_DIO_GPIO_Port, DS1302_DIO_Pin, GPIO_PIN_RESET )
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#define IO_SET HAL_GPIO_WritePin(DS1302_DIO_GPIO_Port, DS1302_DIO_Pin, GPIO_PIN_SET )
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#define IO_READ HAL_GPIO_ReadPin (DS1302_DIO_GPIO_Port, DS1302_DIO_Pin )
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#define SCK_CLR HAL_GPIO_WritePin(DS1302_CLK_GPIO_Port, DS1302_CLK_Pin, GPIO_PIN_RESET )
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#define SCK_SET HAL_GPIO_WritePin(DS1302_CLK_GPIO_Port, DS1302_CLK_Pin, GPIO_PIN_SET )
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static void bsp_DS1302Init(void);
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static void bsp_DS1302_Task(void);
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static void bsp_DS1302_Set(bsp_DS1302_Time_t *pTime);
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bsp_DS1302_t DS1302 =
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{
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.Init = bsp_DS1302Init,
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.Task = bsp_DS1302_Task,
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.Set = bsp_DS1302_Set,
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};
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bsp_DS1302_t *pDS1302 = &DS1302;
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static void bsp_DS1302DataInput(void)
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{
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GPIO_InitTypeDef GPIO_InitStruct; //<2F><><EFBFBD><EFBFBD>GPIO<49>ṹ<EFBFBD><E1B9B9>
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GPIO_InitStruct.Pin = DS1302_DIO_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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HAL_GPIO_Init(DS1302_DIO_GPIO_Port, &GPIO_InitStruct);
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}
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static void bsp_DS1302DataOutput(void)
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{
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GPIO_InitTypeDef GPIO_InitStruct; //<2F><><EFBFBD><EFBFBD>GPIO<49>ṹ<EFBFBD><E1B9B9>
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GPIO_InitStruct.Pin = DS1302_DIO_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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HAL_GPIO_Init(DS1302_DIO_GPIO_Port, &GPIO_InitStruct);
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}
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/*<2A><>bsp_DS1302д<32><D0B4>һ<EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>*/
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static void bsp_DS1302_write_byte(u8 Addr, u8 Data)
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{
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u8 i;
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RST_SET; /*<2A><><EFBFBD><EFBFBD>bsp_DS1302<30><32><EFBFBD><EFBFBD>*/
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bsp_DS1302_DELAY();
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/*д<><D0B4>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>addr*/
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Addr = Addr & 0xFE;/*<2A><><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>*/
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for(i=0; i<8; i++){
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if(Addr&0x01) IO_SET;
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else IO_CLR;
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bsp_DS1302_DELAY();
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SCK_SET;
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bsp_DS1302_DELAY();
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SCK_CLR;
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bsp_DS1302_DELAY();
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Addr = Addr >> 1;
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}
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/*д<><D0B4><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD>d*/
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for(i=0; i<8; i++){
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if(Data&0x01) IO_SET;
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else IO_CLR;
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bsp_DS1302_DELAY();
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SCK_SET;
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bsp_DS1302_DELAY();
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SCK_CLR;
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bsp_DS1302_DELAY();
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Data = Data >> 1;
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}
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RST_CLR; /*ֹͣbsp_DS1302<30><32><EFBFBD><EFBFBD>*/
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bsp_DS1302_DELAY();
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}
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/*<2A><>bsp_DS1302<30><32><EFBFBD><EFBFBD>һ<EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>*/
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static u8 bsp_DS1302_read_byte(u8 Addr)
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{
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u8 i;
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u8 temp;
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RST_SET; /*<2A><><EFBFBD><EFBFBD>bsp_DS1302<30><32><EFBFBD><EFBFBD>*/
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bsp_DS1302_DELAY();
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/*д<><D0B4>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>addr*/
|
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Addr = Addr | 0x01;/*<2A><><EFBFBD><EFBFBD>λ<EFBFBD>ø<EFBFBD>*/
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for(i=0; i<8; i++)
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{
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if(Addr&0x01)
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{
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IO_SET;
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}
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else
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{
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IO_CLR;
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}
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bsp_DS1302_DELAY();
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SCK_SET;
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bsp_DS1302_DELAY();
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SCK_CLR;
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bsp_DS1302_DELAY();
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Addr = Addr >> 1;
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}
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bsp_DS1302DataInput();
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/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD>temp*/
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for(i=0; i<8; i++)
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{
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temp = temp>>1;
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if(IO_READ) temp |= 0x80;
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else temp&=0x7F;
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bsp_DS1302_DELAY();
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SCK_SET;
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bsp_DS1302_DELAY();
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SCK_CLR;
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bsp_DS1302_DELAY();
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}
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RST_CLR; /*ֹͣbsp_DS1302<30><32><EFBFBD><EFBFBD>*/
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bsp_DS1302_DELAY();
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bsp_DS1302DataOutput();
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return temp;
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}
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||||
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static u8 HexToBCD(u8 code)
|
||||
{
|
||||
u8 temp;
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||||
temp = ((code / 10)<<4)+(code % 10);
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return temp;
|
||||
}
|
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|
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static void bsp_DS1302_Set(bsp_DS1302_Time_t *pTime)
|
||||
{
|
||||
bsp_DS1302_write_byte(BSP_DS1302_CONTROL_ADDR,0x00); //<2F>ر<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>
|
||||
bsp_DS1302_write_byte(BSP_DS1302_SEC_ADDR,0x80); //<2F><>ͣ
|
||||
|
||||
bsp_DS1302_write_byte(BSP_DS1302_YEAR_ADDR, HexToBCD(pTime->Year));
|
||||
bsp_DS1302_write_byte(BSP_DS1302_MONTH_ADDR, HexToBCD(pTime->Month));
|
||||
bsp_DS1302_write_byte(BSP_DS1302_DATA_ADDR, HexToBCD(pTime->Day));
|
||||
bsp_DS1302_write_byte(BSP_DS1302_HOUR_ADDR, HexToBCD(pTime->Hour));
|
||||
bsp_DS1302_write_byte(BSP_DS1302_MIN_ADDR, HexToBCD(pTime->Minute));
|
||||
bsp_DS1302_write_byte(BSP_DS1302_SEC_ADDR, HexToBCD(pTime->Second));
|
||||
|
||||
bsp_DS1302_write_byte(BSP_DS1302_CONTROL_ADDR,0x80); //<2F><><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
static void bsp_DS1302_Task(void)
|
||||
{
|
||||
u8 RegData;
|
||||
|
||||
RegData = bsp_DS1302_read_byte(BSP_DS1302_YEAR_ADDR);
|
||||
pDS1302->Time.Year = (RegData/16)*10 + RegData%16;
|
||||
|
||||
RegData = bsp_DS1302_read_byte(BSP_DS1302_MONTH_ADDR);
|
||||
pDS1302->Time.Month = (RegData/16)*10 + RegData%16;
|
||||
|
||||
RegData = bsp_DS1302_read_byte(BSP_DS1302_DATA_ADDR);
|
||||
pDS1302->Time.Day = (RegData/16)*10 + RegData%16;
|
||||
|
||||
RegData = bsp_DS1302_read_byte(BSP_DS1302_HOUR_ADDR);
|
||||
pDS1302->Time.Hour = (RegData/16)*10 + RegData%16;
|
||||
|
||||
RegData = bsp_DS1302_read_byte(BSP_DS1302_MIN_ADDR);
|
||||
pDS1302->Time.Minute = (RegData/16)*10 + RegData%16;
|
||||
|
||||
RegData = bsp_DS1302_read_byte(BSP_DS1302_SEC_ADDR);
|
||||
pDS1302->Time.Second = (RegData/16)*10 + RegData%16;
|
||||
|
||||
}
|
||||
|
||||
static void bsp_DS1302Init(void)
|
||||
{
|
||||
RST_SET;
|
||||
SCK_CLR;
|
||||
bsp_DS1302_Task();
|
||||
if((pDS1302->Time.Year>99)||(pDS1302->Time.Month>12)||(pDS1302->Time.Day>31)||
|
||||
(pDS1302->Time.Hour>23)||(pDS1302->Time.Minute>59)||(pDS1302->Time.Second>59))
|
||||
{
|
||||
pDS1302->Time.Year = 25;
|
||||
pDS1302->Time.Month = 1;
|
||||
pDS1302->Time.Day = 1;
|
||||
pDS1302->Time.Hour = 0;
|
||||
pDS1302->Time.Minute = 0;
|
||||
pDS1302->Time.Second = 0;
|
||||
bsp_DS1302_Set(&pDS1302->Time);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
37
usr/bsp/bsp_DS1302.h
Normal file
37
usr/bsp/bsp_DS1302.h
Normal file
@@ -0,0 +1,37 @@
|
||||
#ifndef __BSP_DS1302_H__
|
||||
#define __BSP_DS1302_H__
|
||||
|
||||
#include "main.h"
|
||||
|
||||
#define BSP_DS1302_SEC_ADDR 0x80 //<2F><><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>ַ
|
||||
#define BSP_DS1302_MIN_ADDR 0x82 //<2F><><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>ַ
|
||||
#define BSP_DS1302_HOUR_ADDR 0x84 //ʱ<><CAB1><EFBFBD>ݵ<EFBFBD>ַ
|
||||
#define BSP_DS1302_DATA_ADDR 0x86 //<2F><><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>ַ
|
||||
#define BSP_DS1302_MONTH_ADDR 0x88 //<2F><><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>ַ
|
||||
#define BSP_DS1302_DAY_ADDR 0x8a //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>ַ
|
||||
#define BSP_DS1302_YEAR_ADDR 0x8c //<2F><><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>ַ
|
||||
#define BSP_DS1302_CONTROL_ADDR 0x8e //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>ַ
|
||||
#define BSP_DS1302_CHARGER_ADDR 0x90
|
||||
#define BSP_DS1302_CLKBURST_ADDR 0xbe
|
||||
|
||||
typedef struct
|
||||
{
|
||||
u16 Year;
|
||||
u8 Month;
|
||||
u8 Day;
|
||||
u8 Hour;
|
||||
u8 Minute;
|
||||
u8 Second;
|
||||
}bsp_DS1302_Time_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
bsp_DS1302_Time_t Time;
|
||||
void (*Init)(void);
|
||||
u8 (*Set)(bsp_DS1302_Time_t *);
|
||||
void (*Task)(void);
|
||||
}bsp_DS1302_t;
|
||||
|
||||
extern bsp_DS1302_t DS1302;//ϵͳʱ<CDB3><CAB1>
|
||||
|
||||
#endif
|
||||
1
usr/bsp/bsp_Delay.c
Normal file
1
usr/bsp/bsp_Delay.c
Normal file
@@ -0,0 +1 @@
|
||||
#include "bsp_Delay.h"
|
||||
6
usr/bsp/bsp_Delay.h
Normal file
6
usr/bsp/bsp_Delay.h
Normal file
@@ -0,0 +1,6 @@
|
||||
#ifndef _BSP_DELAY_H_
|
||||
#define _BSP_DELAY_H_
|
||||
|
||||
#include "main.h"
|
||||
|
||||
#endif
|
||||
248
usr/bsp/bsp_Flash.c
Normal file
248
usr/bsp/bsp_Flash.c
Normal file
@@ -0,0 +1,248 @@
|
||||
#include "bsp_Flash.h"
|
||||
#include "string.h"
|
||||
#include "bsp_Wdg.h"
|
||||
#include "bsp_W5500.h"
|
||||
#include "proto_HSMS.h"
|
||||
/* FLASH Memory Definitions */
|
||||
#define BSP_FLASH_SIZE (0x10000UL)
|
||||
#define BSP_FLASH_PAGE_SIZE (FLASH_PAGE_SIZE)
|
||||
#define BSP_FLASH_PAGE_NUM (BSP_FLASH_SIZE/BSP_FLASH_PAGE_SIZE)
|
||||
|
||||
#define BSP_FLASH_ADDR_RW(n) ((uint32_t)(FLASH_BASE + (BSP_FLASH_PAGE_NUM - (n)) * BSP_FLASH_PAGE_SIZE))
|
||||
#define BSP_FLASH_DATASAVE_ADDR BSP_FLASH_ADDR_RW(1)
|
||||
|
||||
static void bsp_Flash_Init(void);
|
||||
static void bsp_FlashDataWrite(void);
|
||||
static void bsp_FlashDataRead(void);
|
||||
static void bsp_FlashReset(void);
|
||||
|
||||
bsp_Flash_t Usr_Flash =
|
||||
{
|
||||
.Init = bsp_Flash_Init,
|
||||
.Write = bsp_FlashDataWrite,
|
||||
.Read = bsp_FlashDataRead,
|
||||
.Reset = bsp_FlashReset,
|
||||
};
|
||||
|
||||
// <20><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>ҳ
|
||||
static HAL_StatusTypeDef bsp_FLASH_ErasePage(uint32_t PageAddress)
|
||||
{
|
||||
FLASH_EraseInitTypeDef EraseInitStruct;
|
||||
uint32_t PageError = 0;
|
||||
|
||||
EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES;
|
||||
EraseInitStruct.PageAddress = PageAddress;
|
||||
EraseInitStruct.NbPages = 1;
|
||||
|
||||
return HAL_FLASHEx_Erase(&EraseInitStruct, &PageError);
|
||||
}
|
||||
|
||||
// <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD> - <20><>32λ<32><CEBB>ȡ
|
||||
static void bsp_Flash_STMFLASH_Read(uint32_t ReadAddr, void *pBuffer, uint32_t size)
|
||||
{
|
||||
uint8_t *pBuf = (uint8_t*)pBuffer;
|
||||
uint32_t *addr = (uint32_t*)ReadAddr;
|
||||
uint32_t words = size / 4;
|
||||
uint32_t bytes_remaining = size % 4;
|
||||
|
||||
// <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>32λ<32><CEBB>
|
||||
for(uint32_t i = 0; i < words; i++)
|
||||
{
|
||||
*((uint32_t*)pBuf) = addr[i];
|
||||
pBuf += 4;
|
||||
}
|
||||
|
||||
// <20><>ȡʣ<C8A1><CAA3><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>
|
||||
if(bytes_remaining > 0)
|
||||
{
|
||||
uint32_t last_word = addr[words];
|
||||
uint8_t *last_bytes = (uint8_t*)&last_word;
|
||||
|
||||
for(uint32_t i = 0; i < bytes_remaining; i++)
|
||||
{
|
||||
pBuf[i] = last_bytes[i];
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><>32λд<CEBB><D0B4>
|
||||
static HAL_StatusTypeDef bsp_Flash_STMFLASH_Write(uint32_t WriteAddr, void *pBuffer, uint32_t size)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
uint8_t *pBuf = (uint8_t*)pBuffer;
|
||||
uint32_t words = size / 4;
|
||||
uint32_t bytes_remaining = size % 4;
|
||||
uint32_t current_addr = WriteAddr;
|
||||
|
||||
HAL_FLASH_Unlock();
|
||||
|
||||
// <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF>ҳ
|
||||
status = bsp_FLASH_ErasePage(WriteAddr);
|
||||
if(status != HAL_OK)
|
||||
{
|
||||
HAL_FLASH_Lock();
|
||||
return status;
|
||||
}
|
||||
|
||||
// д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>32λ<32><CEBB>
|
||||
for(uint32_t i = 0; i < words; i++)
|
||||
{
|
||||
status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD,
|
||||
current_addr,
|
||||
*((uint32_t*)pBuf));
|
||||
if(status != HAL_OK) break;
|
||||
|
||||
current_addr += 4;
|
||||
pBuf += 4;
|
||||
}
|
||||
|
||||
// д<><D0B4>ʣ<EFBFBD><CAA3><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>
|
||||
if(status == HAL_OK && bytes_remaining > 0)
|
||||
{
|
||||
uint32_t last_word = 0xFFFFFFFF; // Ĭ<><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0xFF
|
||||
uint8_t *last_bytes = (uint8_t*)&last_word;
|
||||
|
||||
// <20><><EFBFBD><EFBFBD>ʣ<EFBFBD><CAA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
for(uint32_t i = 0; i < bytes_remaining; i++)
|
||||
{
|
||||
last_bytes[i] = pBuf[i];
|
||||
}
|
||||
|
||||
status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, current_addr, last_word);
|
||||
}
|
||||
|
||||
HAL_FLASH_Lock();
|
||||
return status;
|
||||
}
|
||||
|
||||
static void bsp_FlashReset(void)
|
||||
{
|
||||
u16 port = 5000;
|
||||
Usr_Flash.FlashData.IP_Addr[0] = 192;
|
||||
Usr_Flash.FlashData.IP_Addr[1] = 168;
|
||||
Usr_Flash.FlashData.IP_Addr[2] = 0;
|
||||
Usr_Flash.FlashData.IP_Addr[3] = 100;
|
||||
|
||||
Usr_Flash.FlashData.Port[0] = port >> 8;
|
||||
Usr_Flash.FlashData.Port[1] = port & 0x00ff;
|
||||
|
||||
Usr_Flash.FlashData.Sub_Mask[0] = 255;
|
||||
Usr_Flash.FlashData.Sub_Mask[1] = 255;
|
||||
Usr_Flash.FlashData.Sub_Mask[2] = 255;
|
||||
Usr_Flash.FlashData.Sub_Mask[3] = 0;
|
||||
|
||||
Usr_Flash.FlashData.Gateway_IP[0] = 192;
|
||||
Usr_Flash.FlashData.Gateway_IP[1] = 168;
|
||||
Usr_Flash.FlashData.Gateway_IP[2] = 0;
|
||||
Usr_Flash.FlashData.Gateway_IP[3] = 1;
|
||||
|
||||
Usr_Flash.FlashData.Devic_Id = 0;
|
||||
|
||||
// /*<2A>豸<EFBFBD>ͺ<EFBFBD> - 'Atlas Abatement' */
|
||||
// Usr_Flash.FlashData.Device_ID[0] = ('A' << 8) | 't'; // 'At'
|
||||
// Usr_Flash.FlashData.Device_ID[1] = ('l' << 8) | 'a'; // 'la'
|
||||
// Usr_Flash.FlashData.Device_ID[2] = ('s' << 8) | ' '; // 's '
|
||||
// Usr_Flash.FlashData.Device_ID[3] = ('A' << 8) | 'b'; // 'Ab'
|
||||
// Usr_Flash.FlashData.Device_ID[4] = ('a' << 8) | 't'; // 'at'
|
||||
// Usr_Flash.FlashData.Device_ID[5] = ('e' << 8) | 'm'; // 'em'
|
||||
// Usr_Flash.FlashData.Device_ID[6] = ('e' << 8) | 'n'; // 'en'
|
||||
// Usr_Flash.FlashData.Device_ID[7] = ('t' << 8) | 0x00; // 't\0'
|
||||
//
|
||||
// /*<2A>豸<EFBFBD><E8B1B8>ʶ - 'AHTWA07CHAAC' */
|
||||
// Usr_Flash.FlashData.Device_Model[0] = ('A' << 8) | 'H'; // 'AH'
|
||||
// Usr_Flash.FlashData.Device_Model[1] = ('T' << 8) | 'W'; // 'TW'
|
||||
// Usr_Flash.FlashData.Device_Model[2] = ('A' << 8) | '0'; // 'A0'
|
||||
// Usr_Flash.FlashData.Device_Model[3] = ('7' << 8) | 'C'; // '7C'
|
||||
// Usr_Flash.FlashData.Device_Model[4] = ('H' << 8) | 'A'; // 'HA'
|
||||
// Usr_Flash.FlashData.Device_Model[5] = ('A' << 8) | 'C'; // 'AC'
|
||||
//
|
||||
// Usr_Flash.FlashData.Data_ID1 = 0;
|
||||
// Usr_Flash.FlashData.Collection_event_ID1 = 111101; // <20>ĵ<EFBFBD><C4B5>е<EFBFBD>CEID
|
||||
//// Usr_Flash.FlashData.Report_ID1 = 2329004; // <20>ĵ<EFBFBD><C4B5>е<EFBFBD>Report ID
|
||||
// Usr_Flash.FlashData.Alarm_ID = 2320614; // <20>ĵ<EFBFBD><C4B5>е<EFBFBD>AlarmID
|
||||
//
|
||||
// /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳ<EFBFBD>ʼ<EFBFBD><CABC> */
|
||||
// const char *alarm_types[] = {"Major Warning", "Minor Warning", "Major Alarm", "Minor Alarm"};
|
||||
// for(int i = 0; i < 4; i++) {
|
||||
// const char *type = alarm_types[i];
|
||||
// for(int j = 0; j < 13 && type[j]; j++) {
|
||||
// if(j % 2 == 0) {
|
||||
// Usr_Flash.FlashData.Alarm_Type[i*2 + j/2] = (type[j] << 8) | (type[j+1] ? type[j+1] : 0);
|
||||
// }
|
||||
// }
|
||||
// }
|
||||
|
||||
bsp_FlashDataWrite();
|
||||
}
|
||||
|
||||
static void bsp_Flash_Init(void)
|
||||
{
|
||||
u8 i;
|
||||
|
||||
bsp_FlashDataRead();
|
||||
if( Usr_Flash.FlashData.IP_Addr[0] == 0xff
|
||||
&& Usr_Flash.FlashData.IP_Addr[1] == 0xff
|
||||
&& Usr_Flash.FlashData.IP_Addr[2] == 0xff
|
||||
&& Usr_Flash.FlashData.IP_Addr[3] == 0xff
|
||||
)
|
||||
{
|
||||
bsp_FlashReset();
|
||||
}
|
||||
memcpy(&Usr_Flash.TempFlashData, &Usr_Flash.FlashData, sizeof(bsp_FlashData_t));
|
||||
W5500.IP_Addr[0] = Usr_Flash.FlashData.IP_Addr[0];
|
||||
W5500.IP_Addr[1] = Usr_Flash.FlashData.IP_Addr[1];
|
||||
W5500.IP_Addr[2] = Usr_Flash.FlashData.IP_Addr[2];
|
||||
W5500.IP_Addr[3] = Usr_Flash.FlashData.IP_Addr[3];
|
||||
|
||||
W5500.Gateway_IP[0] =Usr_Flash.FlashData.Gateway_IP[0];
|
||||
W5500.Gateway_IP[1]=Usr_Flash.FlashData.Gateway_IP[1];
|
||||
W5500.Gateway_IP[2]=Usr_Flash.FlashData.Gateway_IP[2];
|
||||
W5500.Gateway_IP[3]=Usr_Flash.FlashData.Gateway_IP[3];
|
||||
|
||||
W5500.W5500_Class[0].ConfigData.Port[0] = Usr_Flash.FlashData.Port[0];
|
||||
W5500.W5500_Class[0].ConfigData.Port[1] = Usr_Flash.FlashData.Port[1];
|
||||
|
||||
W5500.Sub_Mask[0] = Usr_Flash.FlashData.Sub_Mask[0];
|
||||
W5500.Sub_Mask[1] = Usr_Flash.FlashData.Sub_Mask[1];
|
||||
W5500.Sub_Mask[2] = Usr_Flash.FlashData.Sub_Mask[2];
|
||||
W5500.Sub_Mask[3] = Usr_Flash.FlashData.Sub_Mask[3];
|
||||
|
||||
HSMS.Flash_ConfigData.Device_Id = Usr_Flash.FlashData.Devic_Id;
|
||||
|
||||
}
|
||||
|
||||
static void bsp_FlashDataWrite(void)
|
||||
{
|
||||
/*<2A><>ֹ<EFBFBD>ظ<EFBFBD><D8B8><EFBFBD>д<EFBFBD><D0B4>ͬ<EFBFBD><CDAC><EFBFBD><EFBFBD>*/
|
||||
if(memcmp(&Usr_Flash.TempFlashData, &Usr_Flash.FlashData, sizeof(bsp_FlashData_t)) != 0)
|
||||
{
|
||||
Wdg.Feed();
|
||||
|
||||
__disable_irq(); // <20><><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD>ж<EFBFBD>
|
||||
|
||||
HAL_StatusTypeDef status = bsp_Flash_STMFLASH_Write(BSP_FLASH_DATASAVE_ADDR,&Usr_Flash.FlashData,sizeof(bsp_FlashData_t));
|
||||
|
||||
if(status == HAL_OK)
|
||||
{
|
||||
// д<><D0B4><EFBFBD>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||
memcpy(&Usr_Flash.TempFlashData, &Usr_Flash.FlashData, sizeof(bsp_FlashData_t));
|
||||
}
|
||||
else
|
||||
{
|
||||
|
||||
|
||||
}
|
||||
|
||||
__enable_irq(); // <20>ָ<EFBFBD><D6B8>ж<EFBFBD>
|
||||
Wdg.Feed();
|
||||
}
|
||||
}
|
||||
|
||||
static void bsp_FlashDataRead(void)
|
||||
{
|
||||
Wdg.Feed();
|
||||
bsp_Flash_STMFLASH_Read(BSP_FLASH_DATASAVE_ADDR,
|
||||
&Usr_Flash.FlashData,
|
||||
sizeof(bsp_FlashData_t));
|
||||
Wdg.Feed();
|
||||
}
|
||||
63
usr/bsp/bsp_Flash.h
Normal file
63
usr/bsp/bsp_Flash.h
Normal file
@@ -0,0 +1,63 @@
|
||||
#ifndef _BSP_FLASH_H_
|
||||
#define _BSP_FLASH_H_
|
||||
|
||||
#include "main.h"
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>һ<EFBFBD><D2BB>*/
|
||||
u16 SN[5];
|
||||
u8 IP_Addr[4];
|
||||
u8 Gateway_IP[4];
|
||||
u8 Port[2];
|
||||
u8 Sub_Mask[4];
|
||||
u16 Devic_Id;
|
||||
u16 Device_ID[8]; // 'Atlas Abatement' - 15<31>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>豸<EFBFBD>ͺţ<CDBA>16<31>ֽڣ<D6BD>
|
||||
u16 Device_Model[8]; // 'AHTWA07CHAAC' - 12<31>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̨<EFBFBD><CCA8>λ<EFBFBD>ã<EFBFBD>12<31>ֽڣ<D6BD>
|
||||
u16 Device_SN[8]; //<2F>豸SN<53><4E>
|
||||
u16 Station_Name[8]; // <20><>̨<EFBFBD><CCA8><EFBFBD><EFBFBD>
|
||||
u16 Chamber_Name[8]; // ǻ<><C7BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
u16 Manufacturer[8]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>-10<31>ַ<EFBFBD>
|
||||
u16 Version[8]; //<2F><>̨<EFBFBD><CCA8><EFBFBD><EFBFBD><EFBFBD>汾<EFBFBD><E6B1BE>-10<31>ַ<EFBFBD>
|
||||
u16 Station_Type[8]; //<2F><>̨<EFBFBD><CCA8><EFBFBD><EFBFBD>
|
||||
|
||||
|
||||
u16 Alarm_info[20]; //ʹ<><CAB9>PM100<30>е<EFBFBD>
|
||||
u16 Data_ID1; //<2F>ÿ<EFBFBD>
|
||||
u32 Collection_event_ID1; //CEIDΪ<44>̶<EFBFBD>ֵ
|
||||
u32 Report_ID1; //<2F>ÿ<EFBFBD>
|
||||
u32 Alarm_ID; //ʹ<>ú<EFBFBD><C3BA><EFBFBD><EFBFBD>ڲ<EFBFBD><DAB2><EFBFBD>
|
||||
u16 Alarm_Type[7]; // ʹ<>ú<EFBFBD><C3BA><EFBFBD><EFBFBD>ڲ<EFBFBD>
|
||||
u16 Begin_Warning[7]; //<2F><><EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD><DAB2>̶<EFBFBD>Ϊbegin
|
||||
u16 IDS[11]; //<2F>ÿ<EFBFBD>
|
||||
u16 Over_Trigger[9];
|
||||
u16 Equipment[5];
|
||||
u16 E9[19];
|
||||
u16 Device_Type; //<2F>ÿ<EFBFBD>
|
||||
u16 Sensor;
|
||||
u16 Alarm_value;
|
||||
u16 Alarm_ubit;
|
||||
u16 Start_Time[11]; //<2F><>ʼʱ<CABC><CAB1>
|
||||
u16 Alarm_Time[6]; //<2F><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
u16 Alarm[6]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>Ա<EFBFBD><D4B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̨<EFBFBD><CCA8><EFBFBD><EFBFBD>
|
||||
u16 Data_ID2;
|
||||
u16 Collection_event_ID2;
|
||||
u16 Report_ID2;
|
||||
u16 Sub_Device_Type[2]; // <20><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
u16 Sub_Device_State[2]; // <20><><EFBFBD><EFBFBD><EFBFBD>豸״̬
|
||||
u16 State_Change_Time[2]; // ״̬<D7B4>л<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ʽ
|
||||
} bsp_FlashData_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
bsp_FlashData_t TempFlashData;
|
||||
bsp_FlashData_t FlashData;
|
||||
void (*Init)(void);
|
||||
void (*Write)(void);
|
||||
void (*Read)(void);
|
||||
void (*Reset)(void);
|
||||
} bsp_Flash_t;
|
||||
|
||||
extern bsp_Flash_t Usr_Flash;
|
||||
|
||||
#endif
|
||||
39
usr/bsp/bsp_Key.c
Normal file
39
usr/bsp/bsp_Key.c
Normal file
@@ -0,0 +1,39 @@
|
||||
#include "bsp_Key.h"
|
||||
#include "os_timer.h"
|
||||
#include "bsp_Flash.h"
|
||||
|
||||
#define BSP_KEY_ENTER_NUM 500
|
||||
|
||||
static void bsp_key_init(void);
|
||||
static void bsp_key_task(void);
|
||||
|
||||
bsp_key_t key =
|
||||
{
|
||||
.init = bsp_key_init,
|
||||
.task = bsp_key_task,
|
||||
};
|
||||
|
||||
static bsp_key_t *p_key = &key;
|
||||
|
||||
static void bsp_key_init(void)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
static void bsp_key_task(void)
|
||||
{
|
||||
if(GPIO_PIN_RESET == HAL_GPIO_ReadPin(SYS_RESET_GPIO_Port,SYS_RESET_Pin))
|
||||
{
|
||||
p_key->count++;
|
||||
}
|
||||
else
|
||||
{
|
||||
p_key->count = 0;
|
||||
}
|
||||
if(BSP_KEY_ENTER_NUM <= p_key->count)
|
||||
{
|
||||
/*ϵͳ<CFB5><CDB3>λ*/
|
||||
Usr_Flash.Reset();
|
||||
HAL_NVIC_SystemReset();
|
||||
}
|
||||
}
|
||||
12
usr/bsp/bsp_Key.h
Normal file
12
usr/bsp/bsp_Key.h
Normal file
@@ -0,0 +1,12 @@
|
||||
#ifndef _BSP_KEY_H_
|
||||
#define _BSP_KEY_H_
|
||||
|
||||
#include "main.h"
|
||||
typedef struct
|
||||
{
|
||||
u16 count;
|
||||
void (*init)(void);
|
||||
void (*task)(void);
|
||||
}bsp_key_t;
|
||||
extern bsp_key_t key;
|
||||
#endif
|
||||
15
usr/bsp/bsp_LED.h
Normal file
15
usr/bsp/bsp_LED.h
Normal file
@@ -0,0 +1,15 @@
|
||||
#ifndef _BSP_LED_H_
|
||||
#define _BSP_LED_H_
|
||||
|
||||
#include "main.h"
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
void (*Init)(void);
|
||||
void (*Flash)(void);
|
||||
}bsp_Led_t;
|
||||
|
||||
extern bsp_Led_t Led;
|
||||
|
||||
#endif
|
||||
25
usr/bsp/bsp_Led.c
Normal file
25
usr/bsp/bsp_Led.c
Normal file
@@ -0,0 +1,25 @@
|
||||
#include "bsp_Led.h"
|
||||
#include "os_timer.h"
|
||||
|
||||
static void bsp_Led_Init(void);
|
||||
static void bsp_Led_Flash(void);
|
||||
|
||||
bsp_Led_t Led =
|
||||
{
|
||||
.Init = bsp_Led_Init,
|
||||
.Flash = bsp_Led_Flash,
|
||||
};
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˸<EFBFBD><CBB8><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
static void bsp_Led_Init(void)
|
||||
{
|
||||
for(u8 i = 0;i < 20;i++)
|
||||
{
|
||||
Delay_ms(50);
|
||||
HAL_GPIO_TogglePin(LED_RUN_GPIO_Port, LED_RUN_Pin);
|
||||
}
|
||||
}
|
||||
|
||||
static void bsp_Led_Flash(void)
|
||||
{
|
||||
HAL_GPIO_TogglePin(LED_RUN_GPIO_Port, LED_RUN_Pin);
|
||||
}
|
||||
207
usr/bsp/bsp_Uart.c
Normal file
207
usr/bsp/bsp_Uart.c
Normal file
@@ -0,0 +1,207 @@
|
||||
#include "bsp_Uart.h"
|
||||
#include "string.h"
|
||||
|
||||
#define RX_TEMP_BUFF_NUM (1100)
|
||||
|
||||
#define UART1_TX_LEN (32)
|
||||
#define UART1_RX_LEN (1100)
|
||||
|
||||
#define UART2_TX_LEN (32)
|
||||
#define UART2_RX_LEN (1100)
|
||||
|
||||
u8 Rx_Temp_Buff[RX_TEMP_BUFF_NUM];
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>DMA<4D><41><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>*/
|
||||
u8 Uart1_TX_Buff[UART1_TX_LEN];
|
||||
u8 Uart1_Rx_Buff[UART1_RX_LEN];
|
||||
|
||||
u8 Uart2_TX_Buff[UART1_TX_LEN];
|
||||
u8 Uart2_Rx_Buff[UART1_RX_LEN];
|
||||
|
||||
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>DMA+<2B><><EFBFBD>ڿ<EFBFBD><DABF><EFBFBD>+<2B><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>*/
|
||||
|
||||
static void bsp_Uart_Init(bsp_Uart_t *p_Uart);
|
||||
static void bsp_Uart_Send(bsp_Uart_t *p_Uart,u8 *pData, u16 Len);
|
||||
static void bsp_Uart_Tx_DMA_TCInt(bsp_Uart_t *p_Uart);
|
||||
static void bsp_Uart_Rx_IdleInt(bsp_Uart_t *p_Uart);
|
||||
static void bsp_Uart_Rx_TimeIncrement(bsp_Uart_t *p_Uart,u16 Time);
|
||||
static void bsp_Uart_Rx_TimeStart(bsp_Uart_t *p_Uart);
|
||||
static void bsp_Uart_Rx_TimeStop(bsp_Uart_t *p_Uart);
|
||||
static void bsp_Uart_Rx_Task(bsp_Uart_t *p_Uart);
|
||||
|
||||
bsp_Uart_t COM_Uart1 =
|
||||
{
|
||||
.RxQueue = queue(u8,UART1_RX_LEN),
|
||||
.Uart =USART1,
|
||||
|
||||
.Tx_DMA = DMA1,
|
||||
.Rx_DMA = DMA1,
|
||||
|
||||
.Rx_DMA_CH = LL_DMA_CHANNEL_4,
|
||||
.Tx_DMA_CH = LL_DMA_CHANNEL_5,
|
||||
|
||||
.Tx_DMA_Len = UART1_TX_LEN,
|
||||
.Rx_DMA_Len = UART1_RX_LEN,
|
||||
|
||||
.Tx_Addr = &Uart1_TX_Buff[0],
|
||||
.Rx_Addr = &Uart1_Rx_Buff[0],
|
||||
|
||||
.Tx_DMA_CompleteFlag = 1,
|
||||
.Rx_TimeOver = 10, /*<2A><><EFBFBD>ճ<EFBFBD>ʱʱ<CAB1><CAB1>10ms <20><><EFBFBD><EFBFBD>Ϊ0ʱΪ<CAB1><CEAA><EFBFBD>ڿ<EFBFBD><DABF><EFBFBD><EFBFBD>жϴ<D0B6><CFB4><EFBFBD> <20><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>*/
|
||||
|
||||
.Init = bsp_Uart_Init,
|
||||
.Send = bsp_Uart_Send,
|
||||
|
||||
.Tx_DMA_TCInt = bsp_Uart_Tx_DMA_TCInt,
|
||||
|
||||
.Rx_IdleInt = bsp_Uart_Rx_IdleInt,
|
||||
.Rx_TimeIncrementInt = bsp_Uart_Rx_TimeIncrement,
|
||||
.Rx_DataAnalysis = NULL,
|
||||
.Rx_Task = bsp_Uart_Rx_Task,
|
||||
};
|
||||
|
||||
bsp_Uart_t COM_Uart2 =
|
||||
{
|
||||
.RxQueue = queue(u8,UART2_RX_LEN),
|
||||
.Uart =USART2,
|
||||
|
||||
.Tx_DMA = DMA1,
|
||||
.Rx_DMA = DMA1,
|
||||
|
||||
.Rx_DMA_CH = LL_DMA_CHANNEL_1,
|
||||
.Tx_DMA_CH = LL_DMA_CHANNEL_2,
|
||||
|
||||
.Tx_DMA_Len = UART2_TX_LEN,
|
||||
.Rx_DMA_Len = UART2_RX_LEN,
|
||||
|
||||
.Tx_Addr = &Uart2_TX_Buff[0],
|
||||
.Rx_Addr = &Uart2_Rx_Buff[0],
|
||||
|
||||
.Tx_DMA_CompleteFlag = 1,
|
||||
.Rx_TimeOver = 5, /*<2A><><EFBFBD>ճ<EFBFBD>ʱʱ<CAB1><CAB1>10ms<6D><73><EFBFBD><EFBFBD>Ϊ0ʱΪ<CAB1><CEAA><EFBFBD>ڿ<EFBFBD><DABF><EFBFBD><EFBFBD>жϴ<D0B6><CFB4><EFBFBD> <20><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>*/
|
||||
|
||||
.Init = bsp_Uart_Init,
|
||||
.Send = bsp_Uart_Send,
|
||||
|
||||
.Tx_DMA_TCInt = bsp_Uart_Tx_DMA_TCInt,
|
||||
|
||||
.Rx_IdleInt = bsp_Uart_Rx_IdleInt,
|
||||
.Rx_TimeIncrementInt = bsp_Uart_Rx_TimeIncrement,
|
||||
.Rx_DataAnalysis = NULL,
|
||||
.Rx_Task = bsp_Uart_Rx_Task,
|
||||
};
|
||||
|
||||
|
||||
static void bsp_Uart_Init(bsp_Uart_t *p_Uart)
|
||||
{
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
p_Uart->Rx_DataAnalysis = NULL;
|
||||
|
||||
/*RX*/
|
||||
if(NULL == p_Uart->Uart)
|
||||
return;
|
||||
LL_USART_EnableIT_RXNE(p_Uart->Uart); //ʹ<>ܴ<EFBFBD><DCB4>ڽ<EFBFBD><DABD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||
if(NULL != p_Uart->Rx_DMA)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
static void bsp_Uart2_DMASend(bsp_Uart_t *p_Uart,u8 *pData, u16 Len)
|
||||
{
|
||||
while (!p_Uart->Tx_DMA_CompleteFlag); /*<2A>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɱ<EFBFBD>־*/
|
||||
p_Uart->Tx_DMA_CompleteFlag = 0;
|
||||
|
||||
if(p_Uart->Tx_DMA_Len < Len)
|
||||
Len = p_Uart->Tx_DMA_Len;
|
||||
|
||||
memcpy(p_Uart->Tx_Addr, pData, Len); /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD><DDB5><EFBFBD><EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD>*/
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>*/
|
||||
static void bsp_Uart_Rx_IdleInt(bsp_Uart_t *p_Uart)
|
||||
{
|
||||
u8 rx_data;
|
||||
rx_data = LL_USART_ReceiveData8(p_Uart->Uart);
|
||||
queue_push_back(p_Uart->RxQueue,(void *)&rx_data);
|
||||
/*<2A><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>*/
|
||||
bsp_Uart_Rx_TimeStart(p_Uart);
|
||||
}
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
static void bsp_Uart_Send(bsp_Uart_t *p_Uart,u8 *pData, u16 Len)
|
||||
{
|
||||
u16 i;
|
||||
for (i = 0; i < Len; i++)
|
||||
{
|
||||
while (!LL_USART_IsActiveFlag_TXE(p_Uart->Uart));
|
||||
LL_USART_TransmitData8(p_Uart->Uart, pData[i]); // <20><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>ֽڵ<D6BD><DAB5><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
}
|
||||
|
||||
static void bsp_Uart_Tx_DMA_TCInt(bsp_Uart_t *p_Uart)
|
||||
{
|
||||
p_Uart->Tx_DMA_CompleteFlag = 1;
|
||||
}
|
||||
|
||||
/*<2A>жϼ<D0B6><CFBC><EFBFBD>*/
|
||||
static void bsp_Uart_Rx_TimeIncrement(bsp_Uart_t *p_Uart,u16 Time)
|
||||
{
|
||||
/*<2A><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>*/
|
||||
if(1 == p_Uart->Rx_StartFlag)
|
||||
{
|
||||
p_Uart->Rx_TimeCount += Time;
|
||||
}
|
||||
}
|
||||
|
||||
/*<2A><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>*/
|
||||
static void bsp_Uart_Rx_TimeStart(bsp_Uart_t *p_Uart)
|
||||
{
|
||||
p_Uart->Rx_StartFlag = 1;
|
||||
p_Uart->Rx_TimeCount = 0;
|
||||
}
|
||||
|
||||
/*ֹͣ<CDA3><D6B9><EFBFBD><EFBFBD>*/
|
||||
static void bsp_Uart_Rx_TimeStop(bsp_Uart_t *p_Uart)
|
||||
{
|
||||
p_Uart->Rx_StartFlag = 0;
|
||||
p_Uart->Rx_TimeCount = 0;
|
||||
}
|
||||
|
||||
static void bsp_Uart_Rx_Task(bsp_Uart_t *p_Uart)
|
||||
{
|
||||
/*<2A><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɣ<EFBFBD><C9A3><EFBFBD><EFBFBD>յ<EFBFBD>һ֡<D2BB><D6A1><EFBFBD><EFBFBD>*/
|
||||
if(p_Uart->Rx_TimeOver < p_Uart->Rx_TimeCount)
|
||||
{
|
||||
p_Uart->Rx_Len = queue_size(p_Uart->RxQueue);
|
||||
/*ֹͣ<CDA3><D6B9><EFBFBD><EFBFBD>*/
|
||||
bsp_Uart_Rx_TimeStop(p_Uart);
|
||||
if(p_Uart->Rx_Len <= p_Uart->Rx_DMA_Len && (0 != p_Uart->Rx_Len))
|
||||
{
|
||||
if(RX_TEMP_BUFF_NUM < p_Uart->Rx_Len)
|
||||
{
|
||||
queue_clear(p_Uart->RxQueue);
|
||||
}
|
||||
else
|
||||
{
|
||||
for(u16 i = 0;i < p_Uart->Rx_Len;i++)
|
||||
{
|
||||
queue_pop(p_Uart->RxQueue,&Rx_Temp_Buff[i]);
|
||||
}
|
||||
if(NULL != p_Uart->Rx_DataAnalysis)
|
||||
{
|
||||
p_Uart->Rx_DataAnalysis(Rx_Temp_Buff,p_Uart->Rx_Len,p_Uart); /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
}
|
||||
//p_Uart->Send(p_Uart,Rx_Buff,p_Uart->Rx_Len);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
44
usr/bsp/bsp_Uart.h
Normal file
44
usr/bsp/bsp_Uart.h
Normal file
@@ -0,0 +1,44 @@
|
||||
#ifndef _BSP_UART_H_
|
||||
#define _BSP_UART_H_
|
||||
|
||||
#include "main.h"
|
||||
#include "algo_queue.h"
|
||||
|
||||
typedef struct bsp_Uart_t bsp_Uart_t;
|
||||
|
||||
struct bsp_Uart_t
|
||||
{
|
||||
queue RxQueue; /*<2A><><EFBFBD>ݽ<EFBFBD><DDBD>ն<EFBFBD><D5B6><EFBFBD>*/
|
||||
USART_TypeDef *Uart; /*<2A><><EFBFBD><EFBFBD>*/
|
||||
|
||||
DMA_TypeDef *Tx_DMA; /*DMA*/
|
||||
DMA_TypeDef *Rx_DMA;
|
||||
u8 Tx_DMA_CH;
|
||||
u8 Rx_DMA_CH;
|
||||
vu8 Tx_DMA_CompleteFlag; /*DMA<4D><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɱ<EFBFBD>־λ*/
|
||||
|
||||
u8 *Tx_Addr; /*DMA<4D><41><EFBFBD>˻<EFBFBD><CBBB><EFBFBD>*/
|
||||
u8 *Rx_Addr;
|
||||
u16 Tx_DMA_Len;
|
||||
u16 Rx_DMA_Len;
|
||||
|
||||
u16 Rx_Len; /*<2A><><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>*/
|
||||
u16 Rx_TimeCount; /*<2A><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>*/
|
||||
u16 Rx_TimeOver; /*<2A><>ʱʱ<CAB1><CAB1>*/
|
||||
u8 Rx_StartFlag; /*<2A><>ʼ<EFBFBD><CABC>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ*/
|
||||
|
||||
void (*Init)(bsp_Uart_t *); /*<2A><>ʼ<EFBFBD><CABC>*/
|
||||
void (*Send)(bsp_Uart_t *,u8 *,u16); /*<2A><><EFBFBD>ڷ<EFBFBD><DAB7>ͺ<EFBFBD><CDBA><EFBFBD>*/
|
||||
|
||||
void (*Tx_DMA_TCInt)(bsp_Uart_t *); /*DMA<4D><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>*/
|
||||
|
||||
void (*Rx_IdleInt)(bsp_Uart_t *); /*<2A><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>*/
|
||||
void (*Rx_TimeIncrementInt)(bsp_Uart_t *,u16); /*<2A>жϼ<D0B6><CFBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
void (*Rx_DataAnalysis)(u8 *,u16,void *); /*<2A><><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD>*/
|
||||
void (*Rx_Task)(bsp_Uart_t *); /*<2A><><EFBFBD>ڽ<EFBFBD><DABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
|
||||
};
|
||||
|
||||
extern bsp_Uart_t COM_Uart1;
|
||||
extern bsp_Uart_t COM_Uart2;
|
||||
#endif
|
||||
852
usr/bsp/bsp_W5500.c
Normal file
852
usr/bsp/bsp_W5500.c
Normal file
@@ -0,0 +1,852 @@
|
||||
/**********************************************************************************
|
||||
* <20>ļ<EFBFBD><C4BC><EFBFBD> <20><>W5500.c
|
||||
* <20><><EFBFBD><EFBFBD> <20><>W5500 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD>汾 <20><>ST_v3.5
|
||||
* <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>ģ<EFBFBD>鿪<EFBFBD><E9BFAA><EFBFBD>Ŷ<EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> <20><>http://nirenelec.blog.163.com
|
||||
* <20>Ա<EFBFBD> <20><>http://nirenelec.taobao.com
|
||||
**********************************************************************************/
|
||||
|
||||
#include "stm32f1xx.h"
|
||||
#include "stm32f1xx_hal_spi.h"
|
||||
|
||||
#include "bsp_W5500.h"
|
||||
#include "usart.h"
|
||||
#include "stdio.h"
|
||||
#include "spi.h"
|
||||
#include "bsp_print.h"
|
||||
|
||||
|
||||
#define BSP_W5500_SPI_CS_LOW
|
||||
|
||||
|
||||
/*Run_Mode <20>˿ڵ<CBBF><DAB5><EFBFBD><EFBFBD><EFBFBD>ģʽ*/
|
||||
#define BSP_W5500_PORT_RUN_MODE_TCP_SERVER 0x00 /*TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ*/
|
||||
#define BSP_W5500_PORT_RUN_MODE_TCP_CLIENT 0x01 /*TCP<43>ͻ<EFBFBD><CDBB><EFBFBD>ģʽ*/
|
||||
#define BSP_W5500_PORT_RUN_MODE_UDP 0x02 /*UDP(<28>㲥)ģʽ*/
|
||||
|
||||
/*Run_State <20>˿ڵ<CBBF><DAB5><EFBFBD><EFBFBD><EFBFBD>״̬ BITλ*/
|
||||
#define BSP_W5500_PORT_RUN_STATE_INIT 0x01 /*<2A>˿<EFBFBD><CBBF><EFBFBD><EFBFBD>ɳ<EFBFBD>ʼ<EFBFBD><CABC>*/
|
||||
#define BSP_W5500_PORT_RUN_STATE_CONN 0x02 /*<2A>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
|
||||
/*TR_Data_State <20>˿ڵ<CBBF><DAB5>շ<EFBFBD><D5B7><EFBFBD><EFBFBD><EFBFBD>״̬*/
|
||||
#define BSP_W5500_PORT_DATA_RECEIVE 0x01 /*<2A>˿ڽ<CBBF><DABD>յ<EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>*/
|
||||
#define BSP_W5500_PORT_DATA_TRANSMITOK 0x02 /*<2A>˿ڷ<CBBF><DAB7><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD><DDB0><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
|
||||
static void bsp_W5500_Interrupt_Process(void);
|
||||
static void bsp_W5500_Init(void);
|
||||
static void bsp_W5500_Task(void);
|
||||
static void Write_SOCK_Data_Buffer(bsp_W5500_Class_t *pW5500_Class, u8 *dat_ptr, u16 size);
|
||||
static void network_monitor_task(void);
|
||||
void bsp_W5500_Socket_Set(bsp_W5500_Class_t *pW5500_Class);
|
||||
|
||||
static u8 last_link_status = 0; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD>·״̬
|
||||
bsp_W5500_t W5500 =
|
||||
{
|
||||
.Gateway_IP = {192,168,1,1},
|
||||
.Sub_Mask = {255,255,255,0},
|
||||
.Phy_Addr = {0x0c,0x29,0xab,0x7c,0x00,0x01},
|
||||
|
||||
//.IP_Addr = {169,254,107,101},
|
||||
.IP_Addr = {192,168,1,101},
|
||||
.Monitor_task = network_monitor_task,
|
||||
.Interrupt_Process = bsp_W5500_Interrupt_Process,
|
||||
|
||||
.Init = bsp_W5500_Init,
|
||||
.Task = bsp_W5500_Task,
|
||||
.Socket_Send = Write_SOCK_Data_Buffer,
|
||||
|
||||
.W5500_Class[0] =
|
||||
{
|
||||
.SocketPort = 0, /*ʹ<>ö˿<C3B6>0*/
|
||||
.ConfigData.Port = {0x13,0x88},
|
||||
// .ConfigData.DIP = {192,168,1,32},
|
||||
// .ConfigData.DPort = {0x03,0x09},
|
||||
.Run_Mode = BSP_W5500_PORT_RUN_MODE_TCP_SERVER,
|
||||
// .Rx_DataAnalysis = proto_HSMS_Rx_DataAnalysis,
|
||||
},
|
||||
};
|
||||
|
||||
bsp_W5500_t *pW5500 = &W5500;
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : SPI1_Send_Byte
|
||||
* <20><><EFBFBD><EFBFBD> : SPI1<49><31><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : dat:<3A><><EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD><CDB5><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
void SPI1_Send_Byte(u8 dat)
|
||||
{
|
||||
// hspi1.Instance->DR=dat;
|
||||
HAL_SPI_Transmit(&hspi1, &dat, 1, 0xff);
|
||||
// while(__HAL_SPI_GET_FLAG(&hspi1,SPI_FLAG_TXE)==RESET);
|
||||
// SPI_I2S_SendData(SPI1,dat);//д1<D0B4><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// while(SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET);//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD>ݼĴ<DDBC><C4B4><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : SPI1_Send_Short
|
||||
* <20><><EFBFBD><EFBFBD> : SPI1<49><31><EFBFBD><EFBFBD>2<EFBFBD><32><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>(16λ)
|
||||
* <20><><EFBFBD><EFBFBD> : dat:<3A><><EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD>16λ<36><CEBB><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
void SPI1_Send_Short(u16 dat)
|
||||
{
|
||||
SPI1_Send_Byte(dat >> 8); // д<><D0B4><EFBFBD>ݸ<EFBFBD>λ
|
||||
SPI1_Send_Byte(dat); // д<><D0B4><EFBFBD>ݵ<EFBFBD>λ
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Write_W5500_1Byte
|
||||
* <20><><EFBFBD><EFBFBD> : ͨ<><CDA8>SPI1<49><31>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>д1<D0B4><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : reg:16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ,dat:<3A><>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
void Write_W5500_1Byte(u16 reg, u8 dat)
|
||||
{
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(reg); // ͨ<><CDA8>SPI1д16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
SPI1_Send_Byte(FDM1 | RWB_WRITE | COMMON_R); // ͨ<><CDA8>SPI1д<31><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,1<><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,д<><D0B4><EFBFBD><EFBFBD>,ѡ<><D1A1>ͨ<EFBFBD>üĴ<C3BC><C4B4><EFBFBD>
|
||||
SPI1_Send_Byte(dat); // д1<D0B4><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Write_W5500_2Byte
|
||||
* <20><><EFBFBD><EFBFBD> : ͨ<><CDA8>SPI1<49><31>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>д2<D0B4><32><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : reg:16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ,dat:16λ<36><CEBB>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(2<><32><EFBFBD>ֽ<EFBFBD>)
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
void Write_W5500_2Byte(u16 reg, u16 dat)
|
||||
{
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(reg); // ͨ<><CDA8>SPI1д16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
SPI1_Send_Byte(FDM2 | RWB_WRITE | COMMON_R); // ͨ<><CDA8>SPI1д<31><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,2<><32><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,д<><D0B4><EFBFBD><EFBFBD>,ѡ<><D1A1>ͨ<EFBFBD>üĴ<C3BC><C4B4><EFBFBD>
|
||||
SPI1_Send_Short(dat); // д16λ<36><CEBB><EFBFBD><EFBFBD>
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Write_W5500_nByte
|
||||
* <20><><EFBFBD><EFBFBD> : ͨ<><CDA8>SPI1<49><31>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>дn<D0B4><6E><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : reg:16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ,*dat_ptr:<3A><>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>,size:<3A><>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
void Write_W5500_nByte(u16 reg, u8 *dat_ptr, u16 size)
|
||||
{
|
||||
u16 i;
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(reg); // ͨ<><CDA8>SPI1д16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
SPI1_Send_Byte(VDM | RWB_WRITE | COMMON_R); // ͨ<><CDA8>SPI1д<31><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,N<><4E><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,д<><D0B4><EFBFBD><EFBFBD>,ѡ<><D1A1>ͨ<EFBFBD>üĴ<C3BC><C4B4><EFBFBD>
|
||||
|
||||
for (i = 0; i < size; i++) // ѭ<><D1AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>size<7A><65><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4>W5500
|
||||
{
|
||||
SPI1_Send_Byte(*dat_ptr++); // дһ<D0B4><D2BB><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Write_W5500_SOCK_1Byte
|
||||
* <20><><EFBFBD><EFBFBD> : ͨ<><CDA8>SPI1<49><31>ָ<EFBFBD><D6B8><EFBFBD>˿ڼĴ<DABC><C4B4><EFBFBD>д1<D0B4><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : s:<3A>˿ں<CBBF>,reg:16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ,dat:<3A><>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
void Write_W5500_SOCK_1Byte(SOCKET s, u16 reg, u8 dat)
|
||||
{
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(reg); // ͨ<><CDA8>SPI1д16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
SPI1_Send_Byte(FDM1 | RWB_WRITE | (s * 0x20 + 0x08)); // ͨ<><CDA8>SPI1д<31><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,1<><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,д<><D0B4><EFBFBD><EFBFBD>,ѡ<><D1A1><EFBFBD>˿<EFBFBD>s<EFBFBD>ļĴ<C4BC><C4B4><EFBFBD>
|
||||
SPI1_Send_Byte(dat); // д1<D0B4><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Write_W5500_SOCK_2Byte
|
||||
* <20><><EFBFBD><EFBFBD> : ͨ<><CDA8>SPI1<49><31>ָ<EFBFBD><D6B8><EFBFBD>˿ڼĴ<DABC><C4B4><EFBFBD>д2<D0B4><32><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : s:<3A>˿ں<CBBF>,reg:16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ,dat:16λ<36><CEBB>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(2<><32><EFBFBD>ֽ<EFBFBD>)
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
void Write_W5500_SOCK_2Byte(SOCKET s, u16 reg, u16 dat)
|
||||
{
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(reg); // ͨ<><CDA8>SPI1д16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
SPI1_Send_Byte(FDM2 | RWB_WRITE | (s * 0x20 + 0x08)); // ͨ<><CDA8>SPI1д<31><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,2<><32><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,д<><D0B4><EFBFBD><EFBFBD>,ѡ<><D1A1><EFBFBD>˿<EFBFBD>s<EFBFBD>ļĴ<C4BC><C4B4><EFBFBD>
|
||||
SPI1_Send_Short(dat); // д16λ<36><CEBB><EFBFBD><EFBFBD>
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Write_W5500_SOCK_4Byte
|
||||
* <20><><EFBFBD><EFBFBD> : ͨ<><CDA8>SPI1<49><31>ָ<EFBFBD><D6B8><EFBFBD>˿ڼĴ<DABC><C4B4><EFBFBD>д4<D0B4><34><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : s:<3A>˿ں<CBBF>,reg:16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ,*dat_ptr:<3A><>д<EFBFBD><D0B4><EFBFBD><EFBFBD>4<EFBFBD><34><EFBFBD>ֽڻ<D6BD><DABB><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
void Write_W5500_SOCK_4Byte(SOCKET s, u16 reg, u8 *dat_ptr)
|
||||
{
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(reg); // ͨ<><CDA8>SPI1д16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
SPI1_Send_Byte(FDM4 | RWB_WRITE | (s * 0x20 + 0x08)); // ͨ<><CDA8>SPI1д<31><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,4<><34><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,д<><D0B4><EFBFBD><EFBFBD>,ѡ<><D1A1><EFBFBD>˿<EFBFBD>s<EFBFBD>ļĴ<C4BC><C4B4><EFBFBD>
|
||||
|
||||
SPI1_Send_Byte(*dat_ptr++); // д<><D0B4>1<EFBFBD><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SPI1_Send_Byte(*dat_ptr++); // д<><D0B4>2<EFBFBD><32><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SPI1_Send_Byte(*dat_ptr++); // д<><D0B4>3<EFBFBD><33><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SPI1_Send_Byte(*dat_ptr++); // д<><D0B4>4<EFBFBD><34><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Read_W5500_1Byte
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>W5500ָ<30><D6B8><EFBFBD><EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : reg:16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>ȡ<EFBFBD><C8A1><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
u8 Read_W5500_1Byte(u16 reg)
|
||||
{
|
||||
u8 i;
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(reg); // ͨ<><CDA8>SPI1д16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
SPI1_Send_Byte(FDM1 | RWB_READ | COMMON_R); // ͨ<><CDA8>SPI1д<31><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,1<><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,ѡ<><D1A1>ͨ<EFBFBD>üĴ<C3BC><C4B4><EFBFBD>
|
||||
i = hspi1.Instance->DR;
|
||||
// HAL_SPI_Receive(&hspi1,&i,1,0xf);
|
||||
// i=SPI_I2S_ReceiveData(SPI1);
|
||||
SPI1_Send_Byte(0x00); // <20><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
i = hspi1.Instance->DR;
|
||||
// HAL_SPI_Receive(&hspi1,&i,1,0xf);
|
||||
|
||||
// i=SPI_I2S_ReceiveData(SPI1);//<2F><>ȡ1<C8A1><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
return i; // <20><><EFBFBD>ض<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>ļĴ<C4BC><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Read_W5500_SOCK_1Byte
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>W5500ָ<30><D6B8><EFBFBD>˿ڼĴ<DABC><C4B4><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : s:<3A>˿ں<CBBF>,reg:16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>ȡ<EFBFBD><C8A1><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
u8 Read_W5500_SOCK_1Byte(SOCKET s, u16 reg)
|
||||
{
|
||||
u8 i;
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(reg); // ͨ<><CDA8>SPI1д16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
SPI1_Send_Byte(FDM1 | RWB_READ | (s * 0x20 + 0x08)); // ͨ<><CDA8>SPI1д<31><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,1<><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,ѡ<><D1A1><EFBFBD>˿<EFBFBD>s<EFBFBD>ļĴ<C4BC><C4B4><EFBFBD>
|
||||
|
||||
i = hspi1.Instance->DR;
|
||||
// i=SPI_I2S_ReceiveData(SPI1);
|
||||
SPI1_Send_Byte(0x00); // <20><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
i = hspi1.Instance->DR;
|
||||
// i=SPI_I2S_ReceiveData(SPI1);//<2F><>ȡ1<C8A1><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
return i; // <20><><EFBFBD>ض<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>ļĴ<C4BC><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Read_W5500_SOCK_2Byte
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>W5500ָ<30><D6B8><EFBFBD>˿ڼĴ<DABC><C4B4><EFBFBD><EFBFBD><EFBFBD>2<EFBFBD><32><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : s:<3A>˿ں<CBBF>,reg:16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>ȡ<EFBFBD><C8A1><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>2<EFBFBD><32><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>(16λ)
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
u16 Read_W5500_SOCK_2Byte(SOCKET s, u16 reg)
|
||||
{
|
||||
u16 i;
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(reg); // ͨ<><CDA8>SPI1д16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
SPI1_Send_Byte(FDM2 | RWB_READ | (s * 0x20 + 0x08)); // ͨ<><CDA8>SPI1д<31><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,2<><32><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,ѡ<><D1A1><EFBFBD>˿<EFBFBD>s<EFBFBD>ļĴ<C4BC><C4B4><EFBFBD>
|
||||
|
||||
i = hspi1.Instance->DR;
|
||||
// i=SPI_I2S_ReceiveData(SPI1);
|
||||
SPI1_Send_Byte(0x00); // <20><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
i = hspi1.Instance->DR;
|
||||
// i=SPI_I2S_ReceiveData(SPI1);//<2F><>ȡ<EFBFBD><C8A1>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
SPI1_Send_Byte(0x00); // <20><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
i *= 256;
|
||||
i += hspi1.Instance->DR;
|
||||
// i+=SPI_I2S_ReceiveData(SPI1);//<2F><>ȡ<EFBFBD><C8A1>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
return i; // <20><><EFBFBD>ض<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>ļĴ<C4BC><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Read_SOCK_Data_Buffer
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>W5500<30><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : s:<3A>˿ں<CBBF>,*dat_ptr:<3A><><EFBFBD>ݱ<EFBFBD><DDB1>滺<EFBFBD><E6BBBA><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,rx_size<7A><65><EFBFBD>ֽ<EFBFBD>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
u16 Read_SOCK_Data_Buffer(SOCKET s, u8 *dat_ptr)
|
||||
{
|
||||
u16 rx_size;
|
||||
u16 offset, offset1;
|
||||
u16 i;
|
||||
u8 j;
|
||||
|
||||
rx_size = Read_W5500_SOCK_2Byte(s, Sn_RX_RSR);
|
||||
if (rx_size == 0)
|
||||
return 0; // û<><C3BB><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
if (rx_size > 1460)
|
||||
rx_size = 1460;
|
||||
|
||||
offset = Read_W5500_SOCK_2Byte(s, Sn_RX_RD);
|
||||
offset1 = offset;
|
||||
offset &= (S_RX_SIZE - 1); // <20><><EFBFBD><EFBFBD>ʵ<EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(offset); // д16λ<36><CEBB>ַ
|
||||
SPI1_Send_Byte(VDM | RWB_READ | (s * 0x20 + 0x18)); // д<><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,N<><4E><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,ѡ<><D1A1><EFBFBD>˿<EFBFBD>s<EFBFBD>ļĴ<C4BC><C4B4><EFBFBD>
|
||||
j = hspi1.Instance->DR;
|
||||
// j=SPI_I2S_ReceiveData(SPI1);
|
||||
|
||||
if ((offset + rx_size) < S_RX_SIZE) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַδ<D6B7><CEB4><EFBFBD><EFBFBD>W5500<30><30><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
{
|
||||
for (i = 0; i < rx_size; i++) // ѭ<><D1AD><EFBFBD><EFBFBD>ȡrx_size<7A><65><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
SPI1_Send_Byte(0x00); // <20><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
j = hspi1.Instance->DR;
|
||||
// j=SPI_I2S_ReceiveData(SPI1);//<2F><>ȡ1<C8A1><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*dat_ptr = j; // <20><><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1>浽<EFBFBD><E6B5BD><EFBFBD>ݱ<EFBFBD><DDB1>滺<EFBFBD><E6BBBA><EFBFBD><EFBFBD>
|
||||
dat_ptr++; // <20><><EFBFBD>ݱ<EFBFBD><DDB1>滺<EFBFBD><E6BBBA><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>1
|
||||
}
|
||||
}
|
||||
else // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>W5500<30><30><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
{
|
||||
offset = S_RX_SIZE - offset;
|
||||
for (i = 0; i < offset; i++) // ѭ<><D1AD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>ǰoffset<65><74><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
SPI1_Send_Byte(0x00); // <20><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
j = hspi1.Instance->DR;
|
||||
// j=SPI_I2S_ReceiveData(SPI1);//<2F><>ȡ1<C8A1><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*dat_ptr = j; // <20><><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1>浽<EFBFBD><E6B5BD><EFBFBD>ݱ<EFBFBD><DDB1>滺<EFBFBD><E6BBBA><EFBFBD><EFBFBD>
|
||||
dat_ptr++; // <20><><EFBFBD>ݱ<EFBFBD><DDB1>滺<EFBFBD><E6BBBA><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>1
|
||||
}
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(0x00); // д16λ<36><CEBB>ַ
|
||||
SPI1_Send_Byte(VDM | RWB_READ | (s * 0x20 + 0x18)); // д<><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,N<><4E><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,ѡ<><D1A1><EFBFBD>˿<EFBFBD>s<EFBFBD>ļĴ<C4BC><C4B4><EFBFBD>
|
||||
j = hspi1.Instance->DR;
|
||||
// j=SPI_I2S_ReceiveData(SPI1);
|
||||
|
||||
for (; i < rx_size; i++) // ѭ<><D1AD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>rx_size-offset<65><74><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
SPI1_Send_Byte(0x00); // <20><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
j = hspi1.Instance->DR;
|
||||
// j=SPI_I2S_ReceiveData(SPI1);//<2F><>ȡ1<C8A1><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*dat_ptr = j; // <20><><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1>浽<EFBFBD><E6B5BD><EFBFBD>ݱ<EFBFBD><DDB1>滺<EFBFBD><E6BBBA><EFBFBD><EFBFBD>
|
||||
dat_ptr++; // <20><><EFBFBD>ݱ<EFBFBD><DDB1>滺<EFBFBD><E6BBBA><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>1
|
||||
}
|
||||
}
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
offset1 += rx_size; // <20><><EFBFBD><EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ,<2C><><EFBFBD>´ζ<C2B4>ȡ<EFBFBD><C8A1><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD><DDB5><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
||||
Write_W5500_SOCK_2Byte(s, Sn_RX_RD, offset1);
|
||||
Write_W5500_SOCK_1Byte(s, Sn_CR, RECV); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
return rx_size; // <20><><EFBFBD>ؽ<EFBFBD><D8BD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD>ݵij<DDB5><C4B3><EFBFBD>
|
||||
}
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Write_SOCK_Data_Buffer
|
||||
* <20><><EFBFBD><EFBFBD> : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4>W5500<30><30><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : s:<3A>˿ں<CBBF>,*dat_ptr:<3A><><EFBFBD>ݱ<EFBFBD><DDB1>滺<EFBFBD><E6BBBA><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>,size:<3A><>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD>ݵij<DDB5><C4B3><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
static void Write_SOCK_Data_Buffer(bsp_W5500_Class_t *pW5500_Class, u8 *dat_ptr, u16 size)
|
||||
{
|
||||
u16 offset, offset1;
|
||||
u16 i;
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>UDPģʽ,<2C><><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD><DAB4><EFBFBD><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP<49>Ͷ˿ں<CBBF>
|
||||
if ((Read_W5500_SOCK_1Byte(pW5500_Class->SocketPort, Sn_MR) & 0x0f) != SOCK_UDP) // <20><><EFBFBD><EFBFBD>Socket<65><74><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||
{
|
||||
Write_W5500_SOCK_4Byte(pW5500_Class->SocketPort, Sn_DIPR, pW5500_Class->ConfigData.UDP_DIPR); // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP
|
||||
Write_W5500_SOCK_2Byte(pW5500_Class->SocketPort, Sn_DPORTR, pW5500_Class->ConfigData.UDP_DPORT[0]<<8 | pW5500_Class->ConfigData.UDP_DPORT[1]); // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿ں<CBBF>
|
||||
}
|
||||
|
||||
offset = Read_W5500_SOCK_2Byte(pW5500_Class->SocketPort, Sn_TX_WR);
|
||||
offset1 = offset;
|
||||
offset &= (S_TX_SIZE - 1); // <20><><EFBFBD><EFBFBD>ʵ<EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(offset); // д16λ<36><CEBB>ַ
|
||||
SPI1_Send_Byte(VDM | RWB_WRITE | (pW5500_Class->SocketPort * 0x20 + 0x10)); // д<><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,N<><4E><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,д<><D0B4><EFBFBD><EFBFBD>,ѡ<><D1A1><EFBFBD>˿<EFBFBD>s<EFBFBD>ļĴ<C4BC><C4B4><EFBFBD>
|
||||
|
||||
if ((offset + size) < S_TX_SIZE) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַδ<D6B7><CEB4><EFBFBD><EFBFBD>W5500<30><30><EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
{
|
||||
for (i = 0; i < size; i++) // ѭ<><D1AD>д<EFBFBD><D0B4>size<7A><65><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
SPI1_Send_Byte(*dat_ptr++); // д<><D0B4>һ<EFBFBD><D2BB><EFBFBD>ֽڵ<D6BD><DAB5><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
}
|
||||
else // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>W5500<30><30><EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
{
|
||||
offset = S_TX_SIZE - offset;
|
||||
for (i = 0; i < offset; i++) // ѭ<><D1AD>д<EFBFBD><D0B4>ǰoffset<65><74><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
SPI1_Send_Byte(*dat_ptr++); // д<><D0B4>һ<EFBFBD><D2BB><EFBFBD>ֽڵ<D6BD><DAB5><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(0x00); // д16λ<36><CEBB>ַ
|
||||
SPI1_Send_Byte(VDM | RWB_WRITE | (pW5500_Class->SocketPort * 0x20 + 0x10)); // д<><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,N<><4E><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,д<><D0B4><EFBFBD><EFBFBD>,ѡ<><D1A1><EFBFBD>˿<EFBFBD>s<EFBFBD>ļĴ<C4BC><C4B4><EFBFBD>
|
||||
|
||||
for (; i < size; i++) // ѭ<><D1AD>д<EFBFBD><D0B4>size-offset<65><74><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
SPI1_Send_Byte(*dat_ptr++); // д<><D0B4>һ<EFBFBD><D2BB><EFBFBD>ֽڵ<D6BD><DAB5><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
}
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
|
||||
offset1 += size; // <20><><EFBFBD><EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ,<2C><><EFBFBD>´<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD><DDB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
||||
Write_W5500_SOCK_2Byte(pW5500_Class->SocketPort, Sn_TX_WR, offset1);
|
||||
Write_W5500_SOCK_1Byte(pW5500_Class->SocketPort, Sn_CR, SEND); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : W5500_Hardware_Reset
|
||||
* <20><><EFBFBD><EFBFBD> : Ӳ<><D3B2><EFBFBD><EFBFBD>λW5500
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : W5500<30>ĸ<EFBFBD>λ<EFBFBD><CEBB><EFBFBD>ű<EFBFBD><C5B1>ֵ͵<D6B5>ƽ<EFBFBD><C6BD><EFBFBD><EFBFBD>500us<75><73><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ΧW5500
|
||||
*******************************************************************************/
|
||||
void W5500_Hardware_Reset(void)
|
||||
{
|
||||
HAL_GPIO_WritePin(W5500_RST_PORT, W5500_RST, GPIO_PIN_RESET); // <20><>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
HAL_Delay(50);
|
||||
HAL_GPIO_WritePin(W5500_RST_PORT, W5500_RST, GPIO_PIN_SET); // <20><>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
HAL_Delay(100);
|
||||
|
||||
// while((Read_W5500_1Byte(PHYCFGR)&LINK)==0);//<2F>ȴ<EFBFBD><C8B4><EFBFBD>̫<EFBFBD><CCAB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : W5500_Init
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>ʼ<EFBFBD><CABC>W5500<30>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : <20><>ʹ<EFBFBD><CAB9>W5500֮ǰ<D6AE><C7B0><EFBFBD>ȶ<EFBFBD>W5500<30><30>ʼ<EFBFBD><CABC>
|
||||
*******************************************************************************/
|
||||
void W5500_Init(void)
|
||||
{
|
||||
u16 i = 0;
|
||||
|
||||
Write_W5500_1Byte(MR, RST); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λW5500,<2C><>1<EFBFBD><31>Ч,<2C><>λ<EFBFBD><CEBB><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD>0
|
||||
|
||||
HAL_Delay(10); // <20><>ʱ10ms,<2C>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ú<EFBFBD><C3BA><EFBFBD>
|
||||
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(Gateway)<29><>IP<49><50>ַ,Gateway_IPΪ4<CEAA>ֽ<EFBFBD>u8<75><38><EFBFBD><EFBFBD>,<2C>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD>
|
||||
// ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD>ؿ<EFBFBD><D8BF><EFBFBD>ʹͨ<CAB9><CDA8>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ľ<EFBFBD><C4BE>ޣ<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD><EFBFBD>ؿ<EFBFBD><D8BF>Է<EFBFBD><D4B7>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Internet
|
||||
Write_W5500_nByte(GAR, pW5500->Gateway_IP, 4);
|
||||
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(MASK)ֵ,SUB_MASKΪ4<CEAA>ֽ<EFBFBD>u8<75><38><EFBFBD><EFBFBD>,<2C>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
Write_W5500_nByte(SUBR, pW5500->Sub_Mask, 4);
|
||||
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ,PHY_ADDRΪ6<CEAA>ֽ<EFBFBD>u8<75><38><EFBFBD><EFBFBD>,<2C>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD>Ψһ<CEA8><D2BB>ʶ<EFBFBD><CAB6><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵַ
|
||||
// <20>õ<EFBFBD>ֵַ<D6B7><D6B5>Ҫ<EFBFBD><D2AA>IEEE<45><45><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD>OUI<55>Ĺ涨<C4B9><E6B6A8>ǰ3<C7B0><33><EFBFBD>ֽ<EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>̴<EFBFBD><CCB4>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>Ϊ<EFBFBD><CEAA>Ʒ<EFBFBD><C6B7><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ע<EFBFBD><D7A2><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>ֽڱ<D6BD><DAB1><EFBFBD>Ϊż<CEAA><C5BC>
|
||||
Write_W5500_nByte(SHAR, pW5500->Phy_Addr, 6);
|
||||
|
||||
// <20><><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD><EFBFBD><EFBFBD>IP<49><50>ַ,IP_ADDRΪ4<CEAA>ֽ<EFBFBD>u8<75><38><EFBFBD><EFBFBD>,<2C>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD>
|
||||
// ע<>⣬<EFBFBD><E2A3AC><EFBFBD><EFBFBD>IP<49><50><EFBFBD><EFBFBD><EFBFBD>뱾<EFBFBD><EBB1BE>IP<49><50><EFBFBD><EFBFBD>ͬһ<CDAC><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><F2B1BEBB><EFBFBD><EFBFBD><EFBFBD><DEB7>ҵ<EFBFBD><D2B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
Write_W5500_nByte(SIPR, pW5500->IP_Addr, 4);
|
||||
|
||||
// <20><><EFBFBD>÷<EFBFBD><C3B7>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͽ<EFBFBD><CDBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD>С<EFBFBD><D0A1><EFBFBD>ο<EFBFBD>W5500<30><30><EFBFBD><EFBFBD><EFBFBD>ֲ<EFBFBD>
|
||||
for (i = 0; i < 8; i++)
|
||||
{
|
||||
Write_W5500_SOCK_1Byte(i, Sn_RXBUF_SIZE, 0x02); // Socket Rx memory size=2k
|
||||
Write_W5500_SOCK_1Byte(i, Sn_TXBUF_SIZE, 0x02); // Socket Tx mempry size=2k
|
||||
}
|
||||
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>䣬Ĭ<E4A3AC><C4AC>Ϊ2000(200ms)
|
||||
// ÿһ<C3BF><D2BB>λ<EFBFBD><CEBB>ֵΪ100<30><CEA2>,<2C><>ʼ<EFBFBD><CABC>ʱֵ<CAB1><D6B5>Ϊ2000(0x07D0),<2C><><EFBFBD><EFBFBD>200<30><30><EFBFBD><EFBFBD>
|
||||
Write_W5500_2Byte(RTR, 0x07d0);
|
||||
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD><C4AC>Ϊ8<CEAA><38>
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>趨ֵ,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>ж<EFBFBD>(<28><><EFBFBD>صĶ˿<C4B6><CBBF>жϼĴ<CFBC><C4B4><EFBFBD><EFBFBD>е<EFBFBD>Sn_IR <20><>ʱλ(TIMEOUT)<29>á<EFBFBD>1<EFBFBD><31>)
|
||||
Write_W5500_1Byte(RCR, 8);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Detect_Gateway
|
||||
* <20><><EFBFBD><EFBFBD> : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD>TRUE(0xFF),ʧ<>ܷ<EFBFBD><DCB7><EFBFBD>FALSE(0x00)
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
u8 Detect_Gateway(void)
|
||||
{
|
||||
u8 ip_adde[4];
|
||||
ip_adde[0] = pW5500->IP_Addr[0] + 1;
|
||||
ip_adde[1] = pW5500->IP_Addr[1] + 1;
|
||||
ip_adde[2] = pW5500->IP_Addr[2] + 1;
|
||||
ip_adde[3] = pW5500->IP_Addr[3] + 1;
|
||||
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
Write_W5500_SOCK_4Byte(0, Sn_DIPR, ip_adde); // <20><>Ŀ<EFBFBD>ĵ<EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>д<EFBFBD><D0B4><EFBFBD>뱾<EFBFBD><EBB1BE>IP<49><50>ͬ<EFBFBD><CDAC>IPֵ
|
||||
Write_W5500_SOCK_1Byte(0, Sn_MR, MR_TCP); // <20><><EFBFBD><EFBFBD>socketΪTCPģʽ
|
||||
Write_W5500_SOCK_1Byte(0, Sn_CR, OPEN); // <20><><EFBFBD><EFBFBD>Socket
|
||||
HAL_Delay(5); // <20><>ʱ5ms
|
||||
|
||||
if (Read_W5500_SOCK_1Byte(0, Sn_SR) != SOCK_INIT) // <20><><EFBFBD><EFBFBD>socket<65><74><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||
{
|
||||
Write_W5500_SOCK_1Byte(0, Sn_CR, CLOSE); // <20><EFBFBD><F2BFAAB2>ɹ<EFBFBD>,<2C>ر<EFBFBD>Socket
|
||||
return FALSE; // <20><><EFBFBD><EFBFBD>FALSE(0x00)
|
||||
}
|
||||
|
||||
Write_W5500_SOCK_1Byte(0, Sn_CR, CONNECT); // <20><><EFBFBD><EFBFBD>SocketΪConnectģʽ
|
||||
|
||||
do
|
||||
{
|
||||
u16 j = 0;
|
||||
j = Read_W5500_SOCK_1Byte(0, Sn_IR); // <20><>ȡSocket0<74>жϱ<D0B6>־<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>
|
||||
if (j != 0)
|
||||
Write_W5500_SOCK_1Byte(0, Sn_IR, j);
|
||||
HAL_Delay(5); // <20><>ʱ5ms
|
||||
if ((j & IR_TIMEOUT) == IR_TIMEOUT)
|
||||
{
|
||||
return FALSE;
|
||||
}
|
||||
else if (Read_W5500_SOCK_1Byte(0, Sn_DHAR) != 0xff)
|
||||
{
|
||||
Write_W5500_SOCK_1Byte(0, Sn_CR, CLOSE); // <20>ر<EFBFBD>Socket
|
||||
return TRUE;
|
||||
}
|
||||
} while (1);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Socket_Init
|
||||
* <20><><EFBFBD><EFBFBD> : ָ<><D6B8>Socket(0~7)<29><>ʼ<EFBFBD><CABC>
|
||||
* <20><><EFBFBD><EFBFBD> : s:<3A><><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD>Ķ˿<C4B6>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
static void bsp_W5500_Socket_Init(bsp_W5500_Class_t *pW5500_Class)
|
||||
{
|
||||
Write_W5500_SOCK_2Byte(pW5500_Class->SocketPort, Sn_MSSR, 1460); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƭ<EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD>=1460(0x5b4)
|
||||
Write_W5500_SOCK_2Byte(pW5500_Class->SocketPort, Sn_PORT, pW5500_Class->ConfigData.Port[0]<<8 | pW5500_Class->ConfigData.Port[1]);
|
||||
// <20><><EFBFBD>ö˿<C3B6>0Ŀ<30><C4BF>(Զ<><D4B6>)<29>˿ں<CBBF>
|
||||
Write_W5500_SOCK_2Byte(pW5500_Class->SocketPort, Sn_DPORTR, pW5500_Class->ConfigData.DPort[0]<<8 | pW5500_Class->ConfigData.DPort[1]);
|
||||
// <20><><EFBFBD>ö˿<C3B6>0Ŀ<30><C4BF>(Զ<><D4B6>)IP<49><50>ַ
|
||||
Write_W5500_SOCK_4Byte(pW5500_Class->SocketPort, Sn_DIPR, pW5500_Class->ConfigData.DIP);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Socket_Connect
|
||||
* <20><><EFBFBD><EFBFBD> : <20><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>Socket(0~7)Ϊ<>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD>̷<EFBFBD><CCB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : s:<3A><><EFBFBD>趨<EFBFBD>Ķ˿<C4B6>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD>TRUE(0xFF),ʧ<>ܷ<EFBFBD><DCB7><EFBFBD>FALSE(0x00)
|
||||
* ˵<><CBB5> : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Socket<65><74><EFBFBD><EFBFBD><EFBFBD>ڿͻ<DABF><CDBB><EFBFBD>ģʽʱ,<2C><><EFBFBD>øó<C3B8><C3B3><EFBFBD>,<2C><>Զ<EFBFBD>̷<EFBFBD><CCB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӻ<EFBFBD><D3BA><EFBFBD><EFBFBD>ֳ<EFBFBD>ʱ<EFBFBD>жϣ<D0B6><CFA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>,<2C><>Ҫ<EFBFBD><D2AA><EFBFBD>µ<EFBFBD><C2B5>øó<C3B8><C3B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20>ó<EFBFBD><C3B3><EFBFBD>ÿ<EFBFBD><C3BF><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*******************************************************************************/
|
||||
u8 Socket_Connect(SOCKET s)
|
||||
{
|
||||
Write_W5500_SOCK_1Byte(s, Sn_MR, MR_TCP); // <20><><EFBFBD><EFBFBD>socketΪTCPģʽ
|
||||
Write_W5500_SOCK_1Byte(s, Sn_CR, OPEN); // <20><><EFBFBD><EFBFBD>Socket
|
||||
HAL_Delay(5); // <20><>ʱ5ms
|
||||
if (Read_W5500_SOCK_1Byte(s, Sn_SR) != SOCK_INIT) // <20><><EFBFBD><EFBFBD>socket<65><74><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||
{
|
||||
Write_W5500_SOCK_1Byte(s, Sn_CR, CLOSE); // <20><EFBFBD><F2BFAAB2>ɹ<EFBFBD>,<2C>ر<EFBFBD>Socket
|
||||
return FALSE; // <20><><EFBFBD><EFBFBD>FALSE(0x00)
|
||||
}
|
||||
Write_W5500_SOCK_1Byte(s, Sn_CR, CONNECT); // <20><><EFBFBD><EFBFBD>SocketΪConnectģʽ
|
||||
return TRUE; // <20><><EFBFBD><EFBFBD>TRUE,<2C><><EFBFBD>óɹ<C3B3>
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Socket_Listen
|
||||
* <20><><EFBFBD><EFBFBD> : <20><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>Socket(0~7)<29><>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȴ<EFBFBD>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : s:<3A><><EFBFBD>趨<EFBFBD>Ķ˿<C4B6>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD>TRUE(0xFF),ʧ<>ܷ<EFBFBD><DCB7><EFBFBD>FALSE(0x00)
|
||||
* ˵<><CBB5> : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Socket<65><74><EFBFBD><EFBFBD><EFBFBD>ڷ<EFBFBD><DAB7><EFBFBD><EFBFBD><EFBFBD>ģʽʱ,<2C><><EFBFBD>øó<C3B8><C3B3><EFBFBD>,<2C>ȵ<EFBFBD>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20>ó<EFBFBD><C3B3><EFBFBD>ֻ<EFBFBD><D6BB><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>,<2C><>ʹW5500<30><30><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
|
||||
*******************************************************************************/
|
||||
u8 Socket_Listen(SOCKET s)
|
||||
{
|
||||
Write_W5500_SOCK_1Byte(s, Sn_MR, MR_TCP); // <20><><EFBFBD><EFBFBD>socketΪTCPģʽ
|
||||
Write_W5500_SOCK_1Byte(s, Sn_CR, OPEN); // <20><><EFBFBD><EFBFBD>Socket
|
||||
HAL_Delay(5); // <20><>ʱ5ms
|
||||
if (Read_W5500_SOCK_1Byte(s, Sn_SR) != SOCK_INIT) // <20><><EFBFBD><EFBFBD>socket<65><74><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||
{
|
||||
Write_W5500_SOCK_1Byte(s, Sn_CR, CLOSE); // <20><EFBFBD><F2BFAAB2>ɹ<EFBFBD>,<2C>ر<EFBFBD>Socket
|
||||
return FALSE; // <20><><EFBFBD><EFBFBD>FALSE(0x00)
|
||||
}
|
||||
Write_W5500_SOCK_1Byte(s, Sn_CR, LISTEN); // <20><><EFBFBD><EFBFBD>SocketΪ<74><CEAA><EFBFBD><EFBFBD>ģʽ
|
||||
HAL_Delay(5); // <20><>ʱ5ms
|
||||
if (Read_W5500_SOCK_1Byte(s, Sn_SR) != SOCK_LISTEN) // <20><><EFBFBD><EFBFBD>socket<65><74><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||
{
|
||||
Write_W5500_SOCK_1Byte(s, Sn_CR, CLOSE); // <20><><EFBFBD>ò<EFBFBD><C3B2>ɹ<EFBFBD>,<2C>ر<EFBFBD>Socket
|
||||
return FALSE; // <20><><EFBFBD><EFBFBD>FALSE(0x00)
|
||||
}
|
||||
|
||||
return TRUE;
|
||||
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Socket<65>Ĵ<C4B4><F2BFAABA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD>Զ<EFBFBD>̿ͻ<CCBF><CDBB><EFBFBD><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD>Ҫ<EFBFBD>ȴ<EFBFBD>Socket<65>жϣ<D0B6>
|
||||
// <20><><EFBFBD>ж<EFBFBD>Socket<65><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD><C7B7>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD>ο<EFBFBD>W5500<30><30><EFBFBD><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD>Socket<65>ж<EFBFBD>״̬
|
||||
// <20>ڷ<EFBFBD><DAB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF>IP<49><50>Ŀ<EFBFBD>Ķ˿ں<CBBF>
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Socket_UDP
|
||||
* <20><><EFBFBD><EFBFBD> : <20><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>Socket(0~7)ΪUDPģʽ
|
||||
* <20><><EFBFBD><EFBFBD> : s:<3A><><EFBFBD>趨<EFBFBD>Ķ˿<C4B6>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD>TRUE(0xFF),ʧ<>ܷ<EFBFBD><DCB7><EFBFBD>FALSE(0x00)
|
||||
* ˵<><CBB5> : <20><><EFBFBD><EFBFBD>Socket<65><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD>UDPģʽ,<2C><><EFBFBD>øó<C3B8><C3B3><EFBFBD>,<2C><>UDPģʽ<C4A3><CABD>,Socketͨ<74>Ų<EFBFBD><C5B2><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20>ó<EFBFBD><C3B3><EFBFBD>ֻ<EFBFBD><D6BB><EFBFBD><EFBFBD>һ<EFBFBD>Σ<EFBFBD><CEA3><EFBFBD>ʹW5500<30><30><EFBFBD><EFBFBD>ΪUDPģʽ
|
||||
*******************************************************************************/
|
||||
u8 Socket_UDP(SOCKET s)
|
||||
{
|
||||
Write_W5500_SOCK_1Byte(s, Sn_MR, MR_UDP); // <20><><EFBFBD><EFBFBD>SocketΪUDPģʽ*/
|
||||
Write_W5500_SOCK_1Byte(s, Sn_CR, OPEN); // <20><><EFBFBD><EFBFBD>Socket*/
|
||||
HAL_Delay(5); // <20><>ʱ5ms
|
||||
if (Read_W5500_SOCK_1Byte(s, Sn_SR) != SOCK_UDP) // <20><><EFBFBD><EFBFBD>Socket<65><74><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||
{
|
||||
Write_W5500_SOCK_1Byte(s, Sn_CR, CLOSE); // <20><EFBFBD><F2BFAAB2>ɹ<EFBFBD>,<2C>ر<EFBFBD>Socket
|
||||
return FALSE; // <20><><EFBFBD><EFBFBD>FALSE(0x00)
|
||||
}
|
||||
else
|
||||
return TRUE;
|
||||
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Socket<65>Ĵ<C4B4>UDPģʽ<C4A3><CABD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><>ΪSocket<65><74><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD>ڷ<EFBFBD><DAB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP<49><50>Ŀ<EFBFBD><C4BF>Socket<65>Ķ˿ں<CBBF>
|
||||
// <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP<49><50>Ŀ<EFBFBD><C4BF>Socket<65>Ķ˿ں<CBBF><DABA>ǹ̶<C7B9><CCB6><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD>иı<D0B8>,<2C><>ôҲ<C3B4><D2B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : W5500_Interrupt_Process
|
||||
* <20><><EFBFBD><EFBFBD> : W5500<30>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
static void bsp_W5500_Interrupt_Process(void)
|
||||
{
|
||||
u8 i, j;
|
||||
u8 Int_Flag,Socket_Flag;
|
||||
|
||||
IntDispose:
|
||||
|
||||
Int_Flag = Read_W5500_1Byte(SIR); // <20><>ȡ<EFBFBD>˿<EFBFBD><CBBF>жϱ<D0B6>־<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>
|
||||
HAL_Delay(10);
|
||||
for(i=0;i<BSP_W5500_PORT_NUM;i++)
|
||||
{
|
||||
if(Int_Flag & (0x01 << i))
|
||||
{
|
||||
Socket_Flag = Read_W5500_SOCK_1Byte(pW5500->W5500_Class[i].SocketPort, Sn_IR); // <20><>ȡSocket0<74>жϱ<D0B6>־<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>
|
||||
Write_W5500_SOCK_1Byte(pW5500->W5500_Class[i].SocketPort, Sn_IR, Socket_Flag);
|
||||
if (Socket_Flag & IR_CON) // <20><>TCPģʽ<C4A3><CABD>,Socket0<74>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
pW5500->W5500_Class[i].Run_State |= BSP_W5500_PORT_RUN_STATE_CONN; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬0x02,<2C>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӣ<EFBFBD><D3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
if (Socket_Flag & IR_DISCON) // <20><>TCPģʽ<C4A3><CABD>Socket<65>Ͽ<EFBFBD><CFBF><EFBFBD><EFBFBD>Ӵ<EFBFBD><D3B4><EFBFBD>
|
||||
{
|
||||
Write_W5500_SOCK_1Byte(pW5500->W5500_Class[i].SocketPort, Sn_CR, CLOSE); // <20>رն˿<D5B6>,<2C>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD>´<EFBFBD><C2B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
bsp_W5500_Socket_Init(&pW5500->W5500_Class[i]); // ָ<><D6B8>Socket(0~7)<29><>ʼ<EFBFBD><CABC>,<2C><>ʼ<EFBFBD><CABC><EFBFBD>˿<EFBFBD>0
|
||||
pW5500->W5500_Class[i].Run_State = 0; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬0x00,<2C>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||
}
|
||||
if (Socket_Flag & IR_SEND_OK) // Socket0<74><30><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD>ٴ<EFBFBD><D9B4><EFBFBD><EFBFBD><EFBFBD>S_tx_process()<29><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
pW5500->W5500_Class[i].TR_Data_State |= BSP_W5500_PORT_DATA_TRANSMITOK; // <20>˿ڷ<CBBF><DAB7><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD><DDB0><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
if (Socket_Flag & IR_RECV) // Socket<65><74><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>S_rx_process()<29><><EFBFBD><EFBFBD>
|
||||
{
|
||||
pW5500->W5500_Class[i].TR_Data_State |= BSP_W5500_PORT_DATA_RECEIVE; // <20>˿ڽ<CBBF><DABD>յ<EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>
|
||||
}
|
||||
if (Socket_Flag & IR_TIMEOUT) {
|
||||
// 1. <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>жϱ<D0B6>־λ (<28><><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)
|
||||
Write_W5500_SOCK_1Byte(pW5500->W5500_Class[i].SocketPort, Sn_IR, Socket_Flag);
|
||||
|
||||
// 2. ǿ<>ƹر<C6B9>Socket<65><74>ȷ<EFBFBD><C8B7><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD>λ
|
||||
Write_W5500_SOCK_1Byte(pW5500->W5500_Class[i].SocketPort, Sn_CR, CLOSE);
|
||||
|
||||
// 3. (ǿ<><C7BF><EFBFBD>Ƽ<EFBFBD>) <20><><EFBFBD><EFBFBD>һС<D2BB><D0A1><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ȴ<EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD><EFBFBD>ɹرղ<D8B1><D5B2><EFBFBD>
|
||||
HAL_Delay(10);
|
||||
|
||||
// 4. <20>ؼ<EFBFBD><D8BC><EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>´<EFBFBD><C2B4><EFBFBD>Socket<65><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
|
||||
// bsp_W5500_Socket_Init <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Socket<65><74><EFBFBD><EFBFBD>
|
||||
bsp_W5500_Socket_Init(&pW5500->W5500_Class[i]);
|
||||
// bsp_W5500_Socket_Set <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>ģʽ<C4A3><CABD>TCP Server<65><72><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Socket_Listen
|
||||
bsp_W5500_Socket_Set(&pW5500->W5500_Class[i]);
|
||||
|
||||
// 5. <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD>״̬<D7B4><CCAC>־λ
|
||||
pW5500->W5500_Class[i].Run_State = 0;
|
||||
pW5500->W5500_Class[i].TR_Data_State = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
if (Read_W5500_1Byte(SIR) != 0)
|
||||
goto IntDispose;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief <20><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>Socket<65><74>Keep-Alive<76><65><EFBFBD><EFBFBD>
|
||||
* @param s: Socket<65>˿ں<CBBF> (0~7)
|
||||
* @param interval_5s: <20><><EFBFBD><EFBFBD>ʱ<EFBFBD>䣬<EFBFBD><E4A3AC>λ5<CEBB>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD>2<EFBFBD><32>ʾ10<31>롣0<EBA1A3><30>ʾ<EFBFBD><CABE><EFBFBD>á<EFBFBD>
|
||||
*/
|
||||
void w5500_set_keepalive(SOCKET s, uint8_t interval_5s)
|
||||
{
|
||||
Write_W5500_SOCK_1Byte(s, Sn_KPALVTR, interval_5s);
|
||||
}
|
||||
|
||||
void bsp_W5500_Socket_Set(bsp_W5500_Class_t *pW5500_Class)
|
||||
{
|
||||
if (0 == pW5500_Class->Run_State)
|
||||
{
|
||||
switch(pW5500_Class->Run_Mode)
|
||||
{
|
||||
/*TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ*/
|
||||
case BSP_W5500_PORT_RUN_MODE_TCP_SERVER:
|
||||
{
|
||||
if (Socket_Listen(pW5500_Class->SocketPort) == TRUE)
|
||||
{
|
||||
pW5500_Class->Run_State = BSP_W5500_PORT_RUN_STATE_INIT;
|
||||
w5500_set_keepalive(pW5500_Class->SocketPort, 2);
|
||||
}
|
||||
else
|
||||
pW5500_Class->Run_State = 0;
|
||||
}break;
|
||||
/*TCP<43>ͻ<EFBFBD><CDBB><EFBFBD>ģʽ*/
|
||||
case BSP_W5500_PORT_RUN_MODE_TCP_CLIENT:
|
||||
{
|
||||
if(Socket_Connect(pW5500_Class->SocketPort)==TRUE)
|
||||
pW5500_Class->Run_State = BSP_W5500_PORT_RUN_STATE_INIT;
|
||||
else
|
||||
pW5500_Class->Run_State = 0;
|
||||
}break;
|
||||
/*UDPģʽ*/
|
||||
case BSP_W5500_PORT_RUN_MODE_UDP:
|
||||
{
|
||||
if(Socket_UDP(pW5500_Class->SocketPort)==TRUE)
|
||||
pW5500_Class->Run_State = BSP_W5500_PORT_RUN_STATE_INIT | BSP_W5500_PORT_RUN_STATE_CONN;
|
||||
else
|
||||
pW5500_Class->Run_State = 0;
|
||||
}break;
|
||||
default:break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void bsp_W5500_Init()
|
||||
{
|
||||
u8 i;
|
||||
W5500_Hardware_Reset(); /*Ӳ<><D3B2><EFBFBD><EFBFBD>λW5500*/
|
||||
W5500_Init(); /*<2A><>ʼ<EFBFBD><CABC>W5500<30>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
Detect_Gateway(); /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
|
||||
for(i=0;i<BSP_W5500_PORT_NUM;i++)
|
||||
{
|
||||
bsp_W5500_Socket_Init(&pW5500->W5500_Class[i]);
|
||||
pW5500->W5500_Class[i].Run_State = 0; /*<2A><>λ״̬*/
|
||||
//bsp_W5500_Socket_Set(&pW5500->W5500_Class[i]); /*W5500<30>˿ڳ<CBBF>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
}
|
||||
}
|
||||
|
||||
static void bsp_W5500_Task(void)
|
||||
{
|
||||
u8 i;
|
||||
for(i=0;i<BSP_W5500_PORT_NUM;i++)
|
||||
{
|
||||
bsp_W5500_Socket_Set(&pW5500->W5500_Class[i]); /*W5500<30>˿ڳ<CBBF>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
}
|
||||
bsp_W5500_Interrupt_Process(); // W5500<30>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
for(i=0;i<BSP_W5500_PORT_NUM;i++)
|
||||
{
|
||||
if ((pW5500->W5500_Class[i].TR_Data_State & BSP_W5500_PORT_DATA_RECEIVE) == BSP_W5500_PORT_DATA_RECEIVE) // <20><><EFBFBD><EFBFBD>Socket0<74><30><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
pW5500->W5500_Class[i].TR_Data_State &= ~BSP_W5500_PORT_DATA_RECEIVE;
|
||||
u16 Len = Read_SOCK_Data_Buffer(0, pW5500->W5500_Class[i].Rx_Buffer);
|
||||
// Write_SOCK_Data_Buffer(&pW5500->W5500_Class[i], pW5500->W5500_Class[i].Rx_Buffer, Len);
|
||||
// printf("RX");
|
||||
// Debug_UartSend(pW5500->W5500_Class[i].Rx_Buffer, Len);
|
||||
if(pW5500->W5500_Class[i].Rx_DataAnalysis != NULL)
|
||||
{
|
||||
pW5500->W5500_Class[i].Rx_DataAnalysis(&pW5500->W5500_Class[i],pW5500->W5500_Class[i].Rx_Buffer,Len);/*<2A><><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD>*/
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief <20><>ȡ W5500 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·״̬
|
||||
* @return 1: <20><>·<EFBFBD><C2B7><EFBFBD><EFBFBD>, 0: <20><>·<EFBFBD>Ͽ<EFBFBD>
|
||||
*/
|
||||
static u8 w5500_get_link_status(void)
|
||||
{
|
||||
u8 phycfgr = Read_W5500_1Byte(PHYCFGR); // <20><>ȡ PHYCFGR <20>Ĵ<EFBFBD><C4B4><EFBFBD>
|
||||
return (phycfgr & LINK) ? 1 : 0; // <20><><EFBFBD><EFBFBD> LINK λ
|
||||
}
|
||||
|
||||
|
||||
static void network_monitor_task(void)
|
||||
{
|
||||
u8 current_link = w5500_get_link_status();
|
||||
|
||||
if (last_link_status == 0 && current_link == 1) {
|
||||
/*<2A><>·<EFBFBD>ӶϿ<D3B6><CFBF><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>ӣ<EFBFBD>ִ<EFBFBD>лָ<D0BB><D6B8><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
W5500.Init();
|
||||
}
|
||||
|
||||
last_link_status = current_link;
|
||||
}
|
||||
270
usr/bsp/bsp_W5500.h
Normal file
270
usr/bsp/bsp_W5500.h
Normal file
@@ -0,0 +1,270 @@
|
||||
#ifndef _W5500_H_
|
||||
#define _W5500_H_
|
||||
|
||||
#include "main.h"
|
||||
|
||||
/***************** Common Register *****************/
|
||||
#define MR 0x0000
|
||||
#define RST 0x80
|
||||
#define WOL 0x20
|
||||
#define PB 0x10
|
||||
#define PPP 0x08
|
||||
#define FARP 0x02
|
||||
|
||||
#define GAR 0x0001
|
||||
#define SUBR 0x0005
|
||||
#define SHAR 0x0009
|
||||
#define SIPR 0x000f
|
||||
|
||||
#define INTLEVEL 0x0013
|
||||
#define IR 0x0015
|
||||
#define CONFLICT 0x80
|
||||
#define UNREACH 0x40
|
||||
#define PPPOE 0x20
|
||||
#define MP 0x10
|
||||
|
||||
#define IMR 0x0016
|
||||
#define IM_IR7 0x80
|
||||
#define IM_IR6 0x40
|
||||
#define IM_IR5 0x20
|
||||
#define IM_IR4 0x10
|
||||
|
||||
#define SIR 0x0017
|
||||
#define S7_INT 0x80
|
||||
#define S6_INT 0x40
|
||||
#define S5_INT 0x20
|
||||
#define S4_INT 0x10
|
||||
#define S3_INT 0x08
|
||||
#define S2_INT 0x04
|
||||
#define S1_INT 0x02
|
||||
#define S0_INT 0x01
|
||||
|
||||
#define SIMR 0x0018
|
||||
#define S7_IMR 0x80
|
||||
#define S6_IMR 0x40
|
||||
#define S5_IMR 0x20
|
||||
#define S4_IMR 0x10
|
||||
#define S3_IMR 0x08
|
||||
#define S2_IMR 0x04
|
||||
#define S1_IMR 0x02
|
||||
#define S0_IMR 0x01
|
||||
|
||||
#define RTR 0x0019
|
||||
#define RCR 0x001b
|
||||
|
||||
#define PTIMER 0x001c
|
||||
#define PMAGIC 0x001d
|
||||
#define PHA 0x001e
|
||||
#define PSID 0x0024
|
||||
#define PMRU 0x0026
|
||||
|
||||
#define UIPR 0x0028
|
||||
#define UPORT 0x002c
|
||||
|
||||
#define PHYCFGR 0x002e
|
||||
#define RST_PHY 0x80
|
||||
#define OPMODE 0x40
|
||||
#define DPX 0x04
|
||||
#define SPD 0x02
|
||||
#define LINK 0x01
|
||||
|
||||
#define VERR 0x0039
|
||||
|
||||
/********************* Socket Register *******************/
|
||||
#define Sn_MR 0x0000
|
||||
#define MULTI_MFEN 0x80
|
||||
#define BCASTB 0x40
|
||||
#define ND_MC_MMB 0x20
|
||||
#define UCASTB_MIP6B 0x10
|
||||
#define MR_CLOSE 0x00
|
||||
#define MR_TCP 0x01
|
||||
#define MR_UDP 0x02
|
||||
#define MR_MACRAW 0x04
|
||||
|
||||
#define Sn_CR 0x0001
|
||||
#define OPEN 0x01
|
||||
#define LISTEN 0x02
|
||||
#define CONNECT 0x04
|
||||
#define DISCON 0x08
|
||||
#define CLOSE 0x10
|
||||
#define SEND 0x20
|
||||
#define SEND_MAC 0x21
|
||||
#define SEND_KEEP 0x22
|
||||
#define RECV 0x40
|
||||
|
||||
#define Sn_IR 0x0002
|
||||
#define IR_SEND_OK 0x10
|
||||
#define IR_TIMEOUT 0x08
|
||||
#define IR_RECV 0x04
|
||||
#define IR_DISCON 0x02
|
||||
#define IR_CON 0x01
|
||||
|
||||
#define Sn_SR 0x0003
|
||||
#define SOCK_CLOSED 0x00
|
||||
#define SOCK_INIT 0x13
|
||||
#define SOCK_LISTEN 0x14
|
||||
#define SOCK_ESTABLISHED 0x17
|
||||
#define SOCK_CLOSE_WAIT 0x1c
|
||||
#define SOCK_UDP 0x22
|
||||
#define SOCK_MACRAW 0x02
|
||||
|
||||
#define SOCK_SYNSEND 0x15
|
||||
#define SOCK_SYNRECV 0x16
|
||||
#define SOCK_FIN_WAI 0x18
|
||||
#define SOCK_CLOSING 0x1a
|
||||
#define SOCK_TIME_WAIT 0x1b
|
||||
#define SOCK_LAST_ACK 0x1d
|
||||
|
||||
#define Sn_PORT 0x0004
|
||||
#define Sn_DHAR 0x0006
|
||||
#define Sn_DIPR 0x000c
|
||||
#define Sn_DPORTR 0x0010
|
||||
|
||||
#define Sn_MSSR 0x0012
|
||||
#define Sn_TOS 0x0015
|
||||
#define Sn_TTL 0x0016
|
||||
|
||||
#define Sn_RXBUF_SIZE 0x001e
|
||||
#define Sn_TXBUF_SIZE 0x001f
|
||||
#define Sn_TX_FSR 0x0020
|
||||
#define Sn_TX_RD 0x0022
|
||||
#define Sn_TX_WR 0x0024
|
||||
#define Sn_RX_RSR 0x0026
|
||||
#define Sn_RX_RD 0x0028
|
||||
#define Sn_RX_WR 0x002a
|
||||
|
||||
#define Sn_IMR 0x002c
|
||||
#define IMR_SENDOK 0x10
|
||||
#define IMR_TIMEOUT 0x08
|
||||
#define IMR_RECV 0x04
|
||||
#define IMR_DISCON 0x02
|
||||
#define IMR_CON 0x01
|
||||
|
||||
#define Sn_FRAG 0x002d
|
||||
#define Sn_KPALVTR 0x002f
|
||||
|
||||
/*******************************************************************/
|
||||
/************************ SPI Control Byte *************************/
|
||||
/*******************************************************************/
|
||||
/* Operation mode bits */
|
||||
#define VDM 0x00
|
||||
#define FDM1 0x01
|
||||
#define FDM2 0x02
|
||||
#define FDM4 0x03
|
||||
|
||||
/* Read_Write control bit */
|
||||
#define RWB_READ 0x00
|
||||
#define RWB_WRITE 0x04
|
||||
|
||||
/* Block select bits */
|
||||
#define COMMON_R 0x00
|
||||
|
||||
/* Socket 0 */
|
||||
#define S0_REG 0x08
|
||||
#define S0_TX_BUF 0x10
|
||||
#define S0_RX_BUF 0x18
|
||||
|
||||
/* Socket 1 */
|
||||
#define S1_REG 0x28
|
||||
#define S1_TX_BUF 0x30
|
||||
#define S1_RX_BUF 0x38
|
||||
|
||||
/* Socket 2 */
|
||||
#define S2_REG 0x48
|
||||
#define S2_TX_BUF 0x50
|
||||
#define S2_RX_BUF 0x58
|
||||
|
||||
/* Socket 3 */
|
||||
#define S3_REG 0x68
|
||||
#define S3_TX_BUF 0x70
|
||||
#define S3_RX_BUF 0x78
|
||||
|
||||
/* Socket 4 */
|
||||
#define S4_REG 0x88
|
||||
#define S4_TX_BUF 0x90
|
||||
|
||||
/* Socket 5 */
|
||||
#define S5_REG 0xa8
|
||||
#define S5_TX_BUF 0xb0
|
||||
#define S5_RX_BUF 0xb8
|
||||
|
||||
/* Socket 6 */
|
||||
#define S6_REG 0xc8
|
||||
#define S6_TX_BUF 0xd0
|
||||
#define S6_RX_BUF 0xd8
|
||||
|
||||
/* Socket 7 */
|
||||
#define S7_REG 0xe8
|
||||
#define S7_TX_BUF 0xf0
|
||||
#define S7_RX_BUF 0xf8
|
||||
|
||||
#define TRUE 0xff
|
||||
#define FALSE 0x00
|
||||
|
||||
#define S_RX_SIZE 2048 /*<2A><><EFBFBD><EFBFBD>Socket<65><74><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD>Ը<EFBFBD><D4B8><EFBFBD>W5500_RMSR<53><52><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
#define S_TX_SIZE 2048 /*<2A><><EFBFBD><EFBFBD>Socket<65><74><EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD>Ը<EFBFBD><D4B8><EFBFBD>W5500_TMSR<53><52><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
|
||||
/***************----- W5500 GPIO<49><4F><EFBFBD><EFBFBD> -----***************/
|
||||
#define W5500_SCS GPIO_PIN_0 // <20><><EFBFBD><EFBFBD>W5500<30><30>CS<43><53><EFBFBD><EFBFBD>
|
||||
#define W5500_SCS_PORT GPIOB
|
||||
|
||||
#define W5500_RST GPIO_PIN_4 // <20><><EFBFBD><EFBFBD>W5500<30><30>RST<53><54><EFBFBD><EFBFBD>
|
||||
#define W5500_RST_PORT GPIOA
|
||||
|
||||
#define W5500_INT GPIO_PIN_1 // <20><><EFBFBD><EFBFBD>W5500<30><30>INT<4E><54><EFBFBD><EFBFBD>
|
||||
#define W5500_INT_PORT GPIOA
|
||||
|
||||
typedef u8 SOCKET; // <20>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD>˿ں<CBBF><DABA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BSP_W5500_PORT_NUM 1
|
||||
|
||||
#define BSP_W5500_TX_DATA_LEN 2048
|
||||
#define BSP_W5500_RX_DATA_LEN 256
|
||||
|
||||
typedef struct bsp_W5500_Class_t bsp_W5500_Class_t;
|
||||
|
||||
struct bsp_W5500_Class_t
|
||||
{
|
||||
SOCKET SocketPort;
|
||||
struct
|
||||
{
|
||||
/***************----- <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> -----***************/
|
||||
u8 Port[2]; /*<2A>˿<EFBFBD>0<EFBFBD>Ķ˿ں<CBBF>(5000) */
|
||||
u8 DIP[4]; /*<2A>˿<EFBFBD>0Ŀ<30><C4BF>IP<49><50>ַ*/
|
||||
u8 DPort[2]; /*<2A>˿<EFBFBD>0Ŀ<30>Ķ˿ں<CBBF>(6000)*/
|
||||
|
||||
u8 UDP_DIPR[4]; /*UDP(<28>㲥)ģʽ,Ŀ<><C4BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP<49><50>ַ*/
|
||||
u8 UDP_DPORT[2]; /*UDP(<28>㲥)ģʽ,Ŀ<><C4BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿ں<CBBF>*/
|
||||
}ConfigData;
|
||||
/***************----- <20>˿ڵ<CBBF><DAB5><EFBFBD><EFBFBD><EFBFBD>ģʽ -----***************/
|
||||
u8 Run_Mode;
|
||||
/***************----- <20>˿ڵ<CBBF><DAB5><EFBFBD><EFBFBD><EFBFBD>״̬ -----***************/
|
||||
u8 Run_State;
|
||||
/***************----- <20>˿<EFBFBD><CBBF>շ<EFBFBD><D5B7><EFBFBD><EFBFBD>ݵ<EFBFBD>״̬ -----***********/
|
||||
u8 TR_Data_State;
|
||||
/***************----- <20>˿<EFBFBD><CBBF><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD><EFBFBD> -----***************/
|
||||
u8 Rx_Buffer[BSP_W5500_RX_DATA_LEN]; // <20>˿ڽ<CBBF><DABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD><EFBFBD>
|
||||
u8 Tx_Buffer[BSP_W5500_TX_DATA_LEN]; // <20>˿ڷ<CBBF><DAB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
u8 Interrupt; // W5500<30>жϱ<D0B6>־(0:<3A><><EFBFBD>ж<EFBFBD>,1:<3A><><EFBFBD>ж<EFBFBD>)
|
||||
|
||||
void (*Rx_DataAnalysis)(bsp_W5500_Class_t *,u8 *,u16 );
|
||||
};
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
u8 Gateway_IP[4]; /*<2A><><EFBFBD><EFBFBD>IP<49><50>ַ*/
|
||||
u8 Sub_Mask[4]; /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
u8 Phy_Addr[6]; /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ(MAC)*/
|
||||
u8 IP_Addr[4]; /*<2A><><EFBFBD><EFBFBD>IP<49><50>ַ*/
|
||||
bsp_W5500_Class_t W5500_Class[BSP_W5500_PORT_NUM]; /*<2A>˿ڳ<CBBF>Ա*/
|
||||
void (*Interrupt_Process)(void); /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
void (*Init)(void); /*<2A><>ʼ<EFBFBD><CABC>*/
|
||||
void (*Task)(void); /*<2A><><EFBFBD><EFBFBD>*/
|
||||
void (*Monitor_task)(void); /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
void (*Socket_Send)(bsp_W5500_Class_t *, u8 *, u16 ); /*<2A>˿ڷ<CBBF><DAB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
}bsp_W5500_t;
|
||||
|
||||
|
||||
extern bsp_W5500_t W5500;
|
||||
#endif
|
||||
25
usr/bsp/bsp_Wdg.c
Normal file
25
usr/bsp/bsp_Wdg.c
Normal file
@@ -0,0 +1,25 @@
|
||||
#include "bsp_Wdg.h"
|
||||
|
||||
#include "iwdg.h"
|
||||
|
||||
static void bsp_Wdg_Init(void);
|
||||
static void bsp_Wdg_Feed(void);
|
||||
|
||||
bsp_Wdg_t Wdg =
|
||||
{
|
||||
.Init = bsp_Wdg_Init,
|
||||
.Feed = bsp_Wdg_Feed,
|
||||
};
|
||||
|
||||
bsp_Wdg_t *pWdg = &Wdg;
|
||||
|
||||
static void bsp_Wdg_Init(void)
|
||||
{
|
||||
__HAL_DBGMCU_FREEZE_IWDG(); //<2F><><EFBFBD><EFBFBD>ģʽ<C4A3>£<EFBFBD><C2A3><EFBFBD><EFBFBD>ῴ<EFBFBD>Ź<EFBFBD><C5B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
}
|
||||
|
||||
static void bsp_Wdg_Feed(void)
|
||||
{
|
||||
HAL_IWDG_Refresh(&hiwdg);
|
||||
}
|
||||
|
||||
13
usr/bsp/bsp_Wdg.h
Normal file
13
usr/bsp/bsp_Wdg.h
Normal file
@@ -0,0 +1,13 @@
|
||||
#ifndef _BSP_WDG_H_
|
||||
#define _BSP_WDG_H_
|
||||
|
||||
#include "main.h"
|
||||
|
||||
typedef struct
|
||||
{
|
||||
void (*Init)(void);
|
||||
void (*Feed)(void);
|
||||
}bsp_Wdg_t;
|
||||
|
||||
extern bsp_Wdg_t Wdg;
|
||||
#endif
|
||||
455
usr/bsp/bsp_iap.c
Normal file
455
usr/bsp/bsp_iap.c
Normal file
@@ -0,0 +1,455 @@
|
||||
#include "bsp_iap.h"
|
||||
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
|
||||
#include "app.h"
|
||||
|
||||
#include "bsp_uart.h"
|
||||
#include "usr_config.h"
|
||||
|
||||
|
||||
#include "os_timer.h"
|
||||
|
||||
/* IAP ״̬<D7B4><CCAC><EFBFBD><EFBFBD> */
|
||||
#define BSP_IAP_STATE_NOMORAL (0) /* <20><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD>ת */
|
||||
#define BSP_IAP_STATE_UPDATEING (1) /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
#define BSP_IAP_STATE_SUCCEED (2) /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɣ<EFBFBD><EFBFBD><D7BC><EFBFBD><EFBFBD>ת */
|
||||
|
||||
/* IAP Э<><D0AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֡ͷ */
|
||||
#define BSP_IAP_PROTO_RX_HEADER (0x5A)
|
||||
/* IAP Э<><D0AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
#define BSP_IAP_PROTO_RX_CMD_GET_SV (0x01) /* <20><>ȡ<EFBFBD>汾<EFBFBD><E6B1BE> */
|
||||
#define BSP_IAP_PROTO_RX_CMD_CODE_SIZE (0x02) /* <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
#define BSP_IAP_PROTO_RX_CMD_WRITE_DATA (0x03) /* д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
#define BSP_IAP_PROTO_RX_CMD_UNKNOW_1 (0x04) /* δ֪<CEB4><D6AA><EFBFBD><EFBFBD>1 */
|
||||
#define BSP_IAP_PROTO_RX_CMD_UNKNOW_2 (0x05) /* δ֪<CEB4><D6AA><EFBFBD><EFBFBD>2 */
|
||||
#define BSP_IAP_PROTO_RX_CMD_UNKNOW_3 (0x06) /* δ֪<CEB4><D6AA><EFBFBD><EFBFBD>3 */
|
||||
|
||||
/* IAP Э<>鷢<EFBFBD><E9B7A2>֡ͷ */
|
||||
#define BSP_IAP_PROTO_TX_HEADER (0xA5)
|
||||
|
||||
/* IAP Э<><D0AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
#define BSP_IAP_PROTO_ERROR_CODE_SUCCEED (0) /* <20><><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD> */
|
||||
#define BSP_IAP_PROTO_ERROR_CODE_CHECK (1) /* У<><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
#define BSP_IAP_PROTO_ERROR_CODE_CMD (2) /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
#define BSP_IAP_PROTO_ERROR_CODE_LENGTH (3) /* <20><><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD> */
|
||||
|
||||
/* <20><><EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>С */
|
||||
#define BSP_IAP_TX_LEN (32)
|
||||
|
||||
|
||||
|
||||
/* <20><>̬<EFBFBD><CCAC><EFBFBD><EFBFBD> */
|
||||
static u16 bsp_app_time_start; /* <20>ȴ<EFBFBD><C8B4><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ʼʱ<CABC>䣨<EFBFBD><E4A3A8><EFBFBD>룩 */
|
||||
static u8 bsp_iap_tx_buf[BSP_IAP_TX_LEN]; /* <20><><EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD> */
|
||||
|
||||
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
static void app_jump(void);
|
||||
static void flash_page_erase(u16 page_num);
|
||||
static void flash_write_u32(u32 write_addr, u32 *p_buffer, u16 num_write);
|
||||
static void flash_write_u8(u32 write_addr, u8 *p_buffer, u16 num_write);
|
||||
static void bsp_iap_send(u8 *p_data, u16 len);
|
||||
static void bsp_iap_rx_task(u8 *p_data, u16 len, void *other_data);
|
||||
static void bsp_iap_init(void);
|
||||
static void bsp_iap_task(void);
|
||||
static u8 sum_check(u8 *p_data, u16 len);
|
||||
|
||||
/******************************************
|
||||
* <20>ṹ<EFBFBD><E1B9B9>: bsp_iap
|
||||
* <20><><EFBFBD><EFBFBD>: IAP <20><><EFBFBD><EFBFBD>ʵ<EFBFBD><CAB5>
|
||||
* <20><><EFBFBD><EFBFBD>: <20><><EFBFBD><EFBFBD> IAP <20>ľ<EFBFBD><C4BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>úͻص<CDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
*******************************************/
|
||||
bsp_iap_t iap =
|
||||
{
|
||||
.init = bsp_iap_init,
|
||||
.task = bsp_iap_task,
|
||||
};
|
||||
|
||||
/* ȫ<><C8AB>ָ<EFBFBD>룬ָ<EBA3AC><D6B8> IAP <20>ṹ<EFBFBD><E1B9B9> */
|
||||
bsp_iap_t *p_iap = &iap;
|
||||
|
||||
bsp_Uart_t *p_rx_uart;
|
||||
|
||||
/* Ӧ<>ó<EFBFBD><C3B3><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ */
|
||||
#define APP_START_ADDR 0x08002800
|
||||
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD>ֽڣ<D6BD> */
|
||||
#define SECTOR_SIZE FLASH_PAGE_SIZE
|
||||
|
||||
/******************************************
|
||||
* <20><><EFBFBD><EFBFBD>: app_jump
|
||||
* <20><><EFBFBD><EFBFBD>: <20><>ת<EFBFBD><D7AA>Ӧ<EFBFBD>ó<EFBFBD><C3B3><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD>: <20><>
|
||||
* <20><><EFBFBD><EFBFBD>: <20><>
|
||||
* <20><><EFBFBD><EFBFBD>: <20>ر<EFBFBD><D8B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϣ<D0B6><CFA3><EFBFBD><EFBFBD>ö<EFBFBD>ջָ<D5BB>룬<EFBFBD><EBA3AC>ת<EFBFBD><D7AA><EFBFBD>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD>
|
||||
*******************************************/
|
||||
static void app_jump(void)
|
||||
{
|
||||
u32 app_addr = APP_START_ADDR;
|
||||
|
||||
/* <20><><EFBFBD><EFBFBD>Ӧ<EFBFBD>ó<EFBFBD><C3B3><EFBFBD><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>ڣ<EFBFBD><DAA3><EFBFBD>ջָ<D5BB><D6B8><EFBFBD><EFBFBD>Ч<EFBFBD><D0A7> */
|
||||
if (((*(u32*)app_addr) & 0x2FFE0000) == 0x20000000)
|
||||
{
|
||||
typedef void (*iapfun)(void);
|
||||
iapfun jump_to_app;
|
||||
/* <20>ر<EFBFBD><D8B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD> */
|
||||
__disable_irq();
|
||||
|
||||
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>ӵ<EFBFBD>Ĭ<EFBFBD><C4AC>״̬<D7B4><CCAC>ʹ<EFBFBD><CAB9>HSIʱ<49><CAB1> */
|
||||
HAL_RCC_DeInit();
|
||||
|
||||
// LL_USART_Disable(USART1);
|
||||
// LL_USART_Disable(USART2);
|
||||
//
|
||||
// LL_USART_DisableIT_RXNE_RXFNE(USART1);
|
||||
// LL_USART_DisableIT_RXNE_RXFNE(USART2);
|
||||
|
||||
|
||||
SysTick->CTRL = 0;
|
||||
SysTick->LOAD = 0;
|
||||
SysTick->VAL = 0;
|
||||
|
||||
/* <20>ر<EFBFBD><D8B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϣ<D0B6><CFA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϹ<D0B6><CFB9><EFBFBD><EFBFBD><EFBFBD>־ */
|
||||
for (u8 i = 0; i < 8; i++)
|
||||
{
|
||||
NVIC->ICER[i]=0xFFFFFFFF;
|
||||
NVIC->ICPR[i]=0xFFFFFFFF;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* <20><>ת<EFBFBD><D7AA>Ӧ<EFBFBD>ó<EFBFBD><C3B3><EFBFBD> */
|
||||
jump_to_app = (iapfun)*(u32*)(app_addr + 4); /* <20><>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ */
|
||||
__set_MSP(*(u32*)app_addr); /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ջָ<D5BB><D6B8> */
|
||||
__enable_irq();
|
||||
jump_to_app(); /* <20><>ת */
|
||||
while(1);
|
||||
}
|
||||
}
|
||||
|
||||
static void bsp_Flash_FLASH_ErasePage(uint32_t Address)
|
||||
{
|
||||
FLASH_EraseInitTypeDef EraseInitStruct;
|
||||
uint32_t PageError = 0;
|
||||
|
||||
EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES;
|
||||
EraseInitStruct.PageAddress = Address;
|
||||
EraseInitStruct.NbPages = 1;
|
||||
|
||||
HAL_FLASHEx_Erase(&EraseInitStruct, &PageError);
|
||||
}
|
||||
|
||||
/******************************************
|
||||
* <20><><EFBFBD><EFBFBD>: flash_page_erase
|
||||
* <20><><EFBFBD><EFBFBD>: <20><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Flash <20><><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD>: page_num - Ҫ<><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD>: <20><>
|
||||
* <20><><EFBFBD><EFBFBD>: <20><> APP_START_ADDR <20><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> page_num <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*******************************************/
|
||||
static void flash_page_erase(u16 page_num)
|
||||
{
|
||||
u16 i;
|
||||
|
||||
HAL_FLASH_Unlock();//<2F><><EFBFBD><EFBFBD>
|
||||
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_WRPERR );
|
||||
for (i = 0; i < page_num; i++)
|
||||
{
|
||||
bsp_Flash_FLASH_ErasePage(i * SECTOR_SIZE+APP_START_ADDR);
|
||||
}
|
||||
|
||||
HAL_FLASH_Lock();//<2F><><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
|
||||
#include <string.h> // ʹ<><CAB9> memcpy
|
||||
|
||||
/**
|
||||
* @brief <20><><EFBFBD><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4> Flash<73><68><EFBFBD><EFBFBD><EFBFBD>ֱ<EFBFBD><D6B1>̣<EFBFBD>
|
||||
* @param write_addr Flash Ŀ<><C4BF><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 8 <20>ֽڶ<D6BD><DAB6>룩
|
||||
* @param code_buffer Դ<><D4B4><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>룩
|
||||
* @param size Ҫд<D2AA><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD>
|
||||
*/
|
||||
static void flash_code_write(uint32_t write_addr, uint8_t *code_buffer, uint16_t size)
|
||||
{
|
||||
HAL_FLASH_Unlock();
|
||||
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_WRPERR);
|
||||
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD>֣<EFBFBD>2<EFBFBD>ֽڣ<D6BD>д<EFBFBD><D0B4>
|
||||
for (uint16_t i = 0; i < size; i += 2)
|
||||
{
|
||||
uint16_t data;
|
||||
if (i + 1 < size)
|
||||
data = ((uint16_t)code_buffer[i+1] << 8) | code_buffer[i];
|
||||
else
|
||||
data = (uint16_t)code_buffer[i]; // <20><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>ֽڣ<D6BD><DAA3><EFBFBD>8λ<38><CEBB>0
|
||||
|
||||
HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, write_addr + i, data);
|
||||
}
|
||||
|
||||
HAL_FLASH_Lock();
|
||||
}
|
||||
|
||||
/******************************************
|
||||
* <20><><EFBFBD><EFBFBD>: bsp_iap_send
|
||||
* <20><><EFBFBD><EFBFBD>: ͨ<><CDA8> UART1 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD>: p_data - <20><><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
* len - <20><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD>: <20><>
|
||||
* <20><><EFBFBD><EFBFBD>: <20><><EFBFBD><EFBFBD> UART1 <20>ķ<EFBFBD><C4B7>ͽӿ<CDBD>
|
||||
*******************************************/
|
||||
static void bsp_iap_send(u8 *p_data, u16 len)
|
||||
{
|
||||
if(p_rx_uart != NULL)
|
||||
{
|
||||
p_rx_uart->Send(p_rx_uart, p_data, len);
|
||||
}
|
||||
}
|
||||
|
||||
/******************************************
|
||||
* <20><><EFBFBD><EFBFBD>: bsp_iap_init
|
||||
* <20><><EFBFBD><EFBFBD>: IAP <20><>ʼ<EFBFBD><CABC>
|
||||
* <20><><EFBFBD><EFBFBD>: <20><>
|
||||
* <20><><EFBFBD><EFBFBD>: <20><>
|
||||
* <20><><EFBFBD><EFBFBD>: <20><><EFBFBD>ó<EFBFBD>ʼ״̬<D7B4><CCAC><EFBFBD><EFBFBD>ע<EFBFBD><D7A2><EFBFBD><EFBFBD><EFBFBD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*******************************************/
|
||||
static void bsp_iap_init(void)
|
||||
{
|
||||
p_iap->state = BSP_IAP_STATE_NOMORAL;
|
||||
//COM_Uart1.Rx_DataAnalysis = bsp_iap_rx_task;
|
||||
COM_Uart2.Rx_DataAnalysis = bsp_iap_rx_task;
|
||||
}
|
||||
|
||||
/******************************************
|
||||
* <20><><EFBFBD><EFBFBD>: bsp_iap_task
|
||||
* <20><><EFBFBD><EFBFBD>: IAP <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD><EFBFBD>е<EFBFBD><D0B5>ã<EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD>: <20><>
|
||||
* <20><><EFBFBD><EFBFBD>: <20><>
|
||||
* <20><><EFBFBD><EFBFBD>: <20><><EFBFBD>ݵ<EFBFBD>ǰ״ִ̬<CCAC><D6B4><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD>
|
||||
*******************************************/
|
||||
static void bsp_iap_task(void)
|
||||
{
|
||||
switch (p_iap->state)
|
||||
{
|
||||
case BSP_IAP_STATE_NOMORAL: /* <20><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>2 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת APP */
|
||||
{
|
||||
if (TIME_TRUE == OsTimer_CheckTimeOut(bsp_app_time_start, osTime_MSecTick, 1000))
|
||||
{
|
||||
app_jump();
|
||||
}
|
||||
} break;
|
||||
|
||||
case BSP_IAP_STATE_UPDATEING: /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
{
|
||||
/* Ԥ<><D4A4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ܴ<EFBFBD><DCB4><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1> */
|
||||
} break;
|
||||
|
||||
case BSP_IAP_STATE_SUCCEED: /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɣ<EFBFBD><C9A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת */
|
||||
{
|
||||
app_jump();
|
||||
} break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/******************************************
|
||||
* <20><><EFBFBD><EFBFBD>: sum_check
|
||||
* <20><><EFBFBD><EFBFBD>: <20><><EFBFBD><EFBFBD>У<EFBFBD><D0A3><EFBFBD>ͣ<EFBFBD><CDA3>ۼӺ<DBBC>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD>: p_data - <20><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
* len - <20><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD>: У<><D0A3><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD>: <20><><EFBFBD><EFBFBD><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD>ۼ<EFBFBD><DBBC><EFBFBD><EFBFBD>ͣ<EFBFBD>Ȼ<EFBFBD><C8BB>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>룩
|
||||
*******************************************/
|
||||
static u8 sum_check(u8 *p_data, u16 len)
|
||||
{
|
||||
u16 i;
|
||||
u8 sum = 0;
|
||||
|
||||
for (i = 0; i < len; i++)
|
||||
{
|
||||
sum += p_data[i];
|
||||
}
|
||||
return (-sum);
|
||||
}
|
||||
|
||||
/******************************************
|
||||
* <20><><EFBFBD><EFBFBD>: bsp_iap_rx_task
|
||||
* <20><><EFBFBD><EFBFBD>: IAP Э<><D0AD><EFBFBD><EFBFBD><EFBFBD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD>: p_data - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD><EFBFBD>
|
||||
* len - <20><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* other_data - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD>δʹ<CEB4>ã<EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD>: <20><>
|
||||
* <20><><EFBFBD><EFBFBD>: <20><><EFBFBD><EFBFBD> IAP Э<><D0AD>֡<EFBFBD><D6A1>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD>ظ<EFBFBD>
|
||||
*******************************************/
|
||||
static void bsp_iap_rx_task(u8 *p_data, u16 len, void *other_data)
|
||||
{
|
||||
u16 i, cmd, data_len, tx_len = 0;
|
||||
u8 check_data, error_code = BSP_IAP_PROTO_ERROR_CODE_SUCCEED;
|
||||
u8 *p_data_offset;
|
||||
|
||||
if(BSP_IAP_STATE_SUCCEED == p_iap->state)/*<2A><><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD><C9B9><EFBFBD><F3A3ACB2>ٽ<EFBFBD><D9BD>м<EFBFBD><D0BC><EFBFBD>*/
|
||||
{
|
||||
return;
|
||||
}
|
||||
/* ֡ͷ<D6A1><CDB7><EFBFBD><EFBFBD><EFBFBD>ͳ<EFBFBD><CDB3>ȼ<EFBFBD><C8BC><EFBFBD> */
|
||||
if (p_data[0] != BSP_IAP_PROTO_RX_HEADER || len < 4)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
data_len = p_data[1] << 8 | p_data[2];
|
||||
if (len - 4 != data_len) /* <20><><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD> */
|
||||
{
|
||||
error_code = BSP_IAP_PROTO_ERROR_CODE_LENGTH;
|
||||
}
|
||||
else
|
||||
{
|
||||
check_data = sum_check(p_data, len - 1);
|
||||
if (check_data != p_data[len - 1]) /* У<><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
{
|
||||
error_code = BSP_IAP_PROTO_ERROR_CODE_CHECK;
|
||||
}
|
||||
}
|
||||
|
||||
p_rx_uart = (bsp_Uart_t*)(other_data);
|
||||
cmd = p_data[3];
|
||||
p_data_offset = &p_data[4];
|
||||
|
||||
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EEB4A6> */
|
||||
switch (cmd)
|
||||
{
|
||||
case BSP_IAP_PROTO_RX_CMD_GET_SV: /* <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD>汾<EFBFBD><E6B1BE> */
|
||||
{
|
||||
u8 str_len, tx_data_len;
|
||||
|
||||
p_iap->state = BSP_IAP_STATE_UPDATEING; /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬ */
|
||||
|
||||
str_len = strlen(SwVersion) + 1;
|
||||
memcpy(&bsp_iap_tx_buf[3], SwVersion, str_len);
|
||||
tx_data_len = str_len;
|
||||
|
||||
bsp_iap_tx_buf[0] = BSP_IAP_PROTO_TX_HEADER;
|
||||
bsp_iap_tx_buf[1] = tx_data_len + 1;
|
||||
bsp_iap_tx_buf[2] = cmd;
|
||||
bsp_iap_tx_buf[tx_data_len + 3] = sum_check(bsp_iap_tx_buf, bsp_iap_tx_buf[1] + 2);
|
||||
tx_len = bsp_iap_tx_buf[1] + 3;
|
||||
} break;
|
||||
|
||||
case BSP_IAP_PROTO_RX_CMD_CODE_SIZE: /* <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
{
|
||||
u8 tx_data_len;
|
||||
u16 erase_size, erase_page, page_size;
|
||||
|
||||
erase_page = p_data_offset[0] << 8 | p_data_offset[1];
|
||||
page_size = p_data_offset[2] << 8 | p_data_offset[3];
|
||||
p_iap->page_size = page_size;
|
||||
|
||||
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
erase_page /= ((float)SECTOR_SIZE / (float)page_size);
|
||||
flash_page_erase(erase_page);
|
||||
|
||||
tx_data_len = 0;
|
||||
|
||||
bsp_iap_tx_buf[0] = BSP_IAP_PROTO_TX_HEADER;
|
||||
bsp_iap_tx_buf[1] = tx_data_len + 1;
|
||||
bsp_iap_tx_buf[2] = cmd;
|
||||
bsp_iap_tx_buf[tx_data_len + 3] = sum_check(bsp_iap_tx_buf, bsp_iap_tx_buf[1] + 2);
|
||||
tx_len = bsp_iap_tx_buf[1] + 3;
|
||||
} break;
|
||||
|
||||
case BSP_IAP_PROTO_RX_CMD_WRITE_DATA: /* д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
{
|
||||
u8 tx_data_len;
|
||||
u16 index, code_size, addr_offset, i;
|
||||
u32 addr;
|
||||
u8 *p_code_data;
|
||||
|
||||
index = p_data_offset[0] << 8 | p_data_offset[1];
|
||||
code_size = data_len - 3;
|
||||
|
||||
addr = index * p_iap->page_size;
|
||||
p_code_data = &p_data_offset[2];
|
||||
|
||||
|
||||
flash_code_write(APP_START_ADDR+addr, p_code_data, code_size);
|
||||
|
||||
|
||||
/* <20><><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6>֡<EFBFBD><D6A1><EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD> */
|
||||
bsp_iap_tx_buf[3] = index >> 8;
|
||||
bsp_iap_tx_buf[4] = index & 0x00ff;
|
||||
tx_data_len = 2;
|
||||
|
||||
bsp_iap_tx_buf[0] = BSP_IAP_PROTO_TX_HEADER;
|
||||
bsp_iap_tx_buf[1] = tx_data_len + 1;
|
||||
bsp_iap_tx_buf[2] = cmd;
|
||||
bsp_iap_tx_buf[tx_data_len + 3] = sum_check(bsp_iap_tx_buf, bsp_iap_tx_buf[1] + 2);
|
||||
tx_len = bsp_iap_tx_buf[1] + 3;
|
||||
} break;
|
||||
|
||||
case BSP_IAP_PROTO_RX_CMD_UNKNOW_1: /* δ֪<CEB4><D6AA><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɣ<EFBFBD> */
|
||||
{
|
||||
u8 tx_data_len;
|
||||
tx_data_len = 0;
|
||||
p_iap->state = BSP_IAP_STATE_SUCCEED; /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
bsp_iap_tx_buf[0] = BSP_IAP_PROTO_TX_HEADER;
|
||||
bsp_iap_tx_buf[1] = tx_data_len + 1;
|
||||
bsp_iap_tx_buf[2] = cmd;
|
||||
bsp_iap_tx_buf[tx_data_len + 3] = sum_check(bsp_iap_tx_buf, bsp_iap_tx_buf[1] + 2);
|
||||
tx_len = bsp_iap_tx_buf[1] + 3;
|
||||
} break;
|
||||
|
||||
case BSP_IAP_PROTO_RX_CMD_UNKNOW_3: /* δ֪<CEB4><D6AA><EFBFBD><EFBFBD>3<EFBFBD><33><EFBFBD>ش<EFBFBD><D8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֽڣ<D6BD> */
|
||||
{
|
||||
u8 tx_data_len;
|
||||
tx_data_len = 2;
|
||||
bsp_iap_tx_buf[3] = p_data_offset[0];
|
||||
bsp_iap_tx_buf[4] = p_data_offset[1];
|
||||
bsp_iap_tx_buf[0] = BSP_IAP_PROTO_TX_HEADER;
|
||||
bsp_iap_tx_buf[1] = tx_data_len + 1;
|
||||
bsp_iap_tx_buf[2] = cmd;
|
||||
bsp_iap_tx_buf[tx_data_len + 3] = sum_check(bsp_iap_tx_buf, bsp_iap_tx_buf[1] + 2);
|
||||
tx_len = bsp_iap_tx_buf[1] + 3;
|
||||
} break;
|
||||
|
||||
case BSP_IAP_PROTO_RX_CMD_UNKNOW_2: /* δ֪<CEB4><D6AA><EFBFBD><EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD> */
|
||||
{
|
||||
u8 tx_data_len;
|
||||
tx_data_len = 0;
|
||||
bsp_iap_tx_buf[0] = BSP_IAP_PROTO_TX_HEADER;
|
||||
bsp_iap_tx_buf[1] = tx_data_len + 1;
|
||||
bsp_iap_tx_buf[2] = cmd;
|
||||
bsp_iap_tx_buf[tx_data_len + 3] = sum_check(bsp_iap_tx_buf, bsp_iap_tx_buf[1] + 2);
|
||||
tx_len = bsp_iap_tx_buf[1] + 3;
|
||||
} break;
|
||||
|
||||
default:
|
||||
{
|
||||
error_code = BSP_IAP_PROTO_ERROR_CODE_CMD;
|
||||
} break;
|
||||
}
|
||||
|
||||
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
switch (error_code)
|
||||
{
|
||||
case BSP_IAP_PROTO_ERROR_CODE_SUCCEED:
|
||||
{
|
||||
bsp_iap_send(bsp_iap_tx_buf, tx_len);
|
||||
} break;
|
||||
|
||||
case BSP_IAP_PROTO_ERROR_CODE_CHECK:
|
||||
case BSP_IAP_PROTO_ERROR_CODE_CMD:
|
||||
case BSP_IAP_PROTO_ERROR_CODE_LENGTH:
|
||||
{
|
||||
bsp_iap_tx_buf[0] = BSP_IAP_PROTO_TX_HEADER;
|
||||
bsp_iap_tx_buf[1] = 0x01;
|
||||
bsp_iap_tx_buf[2] = cmd;
|
||||
bsp_iap_tx_buf[3] = error_code;
|
||||
bsp_iap_tx_buf[4] = sum_check(bsp_iap_tx_buf, 4);
|
||||
bsp_iap_send(bsp_iap_tx_buf, 5);
|
||||
} break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
32
usr/bsp/bsp_iap.h
Normal file
32
usr/bsp/bsp_iap.h
Normal file
@@ -0,0 +1,32 @@
|
||||
#ifndef _BSP_IAP_H_
|
||||
#define _BSP_IAP_H_
|
||||
|
||||
#include "main.h"
|
||||
|
||||
typedef union
|
||||
{
|
||||
struct
|
||||
{
|
||||
u8 u8_Data[4];
|
||||
};
|
||||
uint32_t u64_Data;
|
||||
}u64_Temp_n;
|
||||
|
||||
|
||||
/******************************************
|
||||
* <20>ṹ<EFBFBD><E1B9B9>: bsp_iap_t
|
||||
* <20><><EFBFBD><EFBFBD>: IAP <20><><EFBFBD>ƽṹ<C6BD><E1B9B9>
|
||||
* <20><><EFBFBD><EFBFBD>: <20>洢 IAP ״̬<D7B4>ͺ<EFBFBD><CDBA><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
*******************************************/
|
||||
typedef struct
|
||||
{
|
||||
u8 state; /* IAP ״̬ */
|
||||
u16 page_size; /* ҳ<><D2B3><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD>ֽڣ<D6BD> */
|
||||
void (*init)(void); /* <20><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8> */
|
||||
void (*task)(void); /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8> */
|
||||
} bsp_iap_t;
|
||||
|
||||
/* <20><><EFBFBD><EFBFBD><EFBFBD>ⲿ<EFBFBD><E2B2BF><EFBFBD><EFBFBD> */
|
||||
extern bsp_iap_t iap;
|
||||
|
||||
#endif /* _BSP_IAP_H_ */
|
||||
27
usr/bsp/bsp_print.c
Normal file
27
usr/bsp/bsp_print.c
Normal file
@@ -0,0 +1,27 @@
|
||||
#include "bsp_print.h"
|
||||
|
||||
#include "bsp_Uart.h"
|
||||
|
||||
#include "stdio.h"
|
||||
|
||||
|
||||
//#include "wk_usart.h"
|
||||
|
||||
|
||||
|
||||
/*<2A>ض<EFBFBD><D8B6><EFBFBD>fputc<74><63><EFBFBD><EFBFBD>*/
|
||||
int fputc(int ch, FILE *f)
|
||||
{
|
||||
u8 Data = ch;
|
||||
COM_Uart1.Send(&COM_Uart1,&Data,1);
|
||||
}
|
||||
|
||||
void Debug_UartSend(u8 *pData,u16 Len)
|
||||
{
|
||||
//COM_Uart1.Send(&COM_Uart1,pData,Len);
|
||||
}
|
||||
|
||||
void UartSend(u8 ch)
|
||||
{
|
||||
COM_Uart1.Send(&COM_Uart1,&ch,1);
|
||||
}
|
||||
8
usr/bsp/bsp_print.h
Normal file
8
usr/bsp/bsp_print.h
Normal file
@@ -0,0 +1,8 @@
|
||||
#ifndef _BSP_PRINT_H_
|
||||
#define _BSP_PRINT_H_
|
||||
|
||||
#include "main.h"
|
||||
|
||||
void Debug_UartSend(u8 *pData,u16 Len);
|
||||
|
||||
#endif
|
||||
106
usr/bsp/sys.h
Normal file
106
usr/bsp/sys.h
Normal file
@@ -0,0 +1,106 @@
|
||||
#ifndef _SYS_H_
|
||||
#define _SYS_H_
|
||||
|
||||
#include "stm32f1xx.h"
|
||||
|
||||
//<2F><><EFBFBD><EFBFBD>һЩ<D2BB><D0A9><EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ͷ̹ؼ<CCB9><D8BC><EFBFBD>
|
||||
typedef int64_t s64;
|
||||
typedef int32_t s32;
|
||||
typedef int16_t s16;
|
||||
typedef int8_t s8;
|
||||
|
||||
typedef const int32_t sc32;
|
||||
typedef const int16_t sc16;
|
||||
typedef const int8_t sc8;
|
||||
|
||||
typedef __IO int32_t vs32;
|
||||
typedef __IO int16_t vs16;
|
||||
typedef __IO int8_t vs8;
|
||||
|
||||
typedef __I int32_t vsc32;
|
||||
typedef __I int16_t vsc16;
|
||||
typedef __I int8_t vsc8;
|
||||
|
||||
typedef uint64_t u64;
|
||||
typedef uint32_t u32;
|
||||
typedef uint16_t u16;
|
||||
typedef uint8_t u8;
|
||||
|
||||
typedef const uint32_t uc32;
|
||||
typedef const uint16_t uc16;
|
||||
typedef const uint8_t uc8;
|
||||
|
||||
typedef __IO uint32_t vu32;
|
||||
typedef __IO uint16_t vu16;
|
||||
typedef __IO uint8_t vu8;
|
||||
|
||||
typedef __I uint32_t vuc32;
|
||||
typedef __I uint16_t vuc16;
|
||||
typedef __I uint8_t vuc8;
|
||||
|
||||
|
||||
#define BITBAND(addr, bitnum) ((addr & 0xF0000000)+0x2000000+((addr &0xFFFFF)<<5)+(bitnum<<2))
|
||||
#define MEM_ADDR(addr) *((volatile unsigned long *)(addr))
|
||||
#define BIT_ADDR(addr, bitnum) MEM_ADDR(BITBAND(addr, bitnum))
|
||||
//IO<49>ڵ<EFBFBD>ַӳ<D6B7><D3B3>
|
||||
#define GPIOA_ODR_Addr (GPIOA_BASE+12) //0x4001080C
|
||||
#define GPIOB_ODR_Addr (GPIOB_BASE+12) //0x40010C0C
|
||||
#define GPIOC_ODR_Addr (GPIOC_BASE+12) //0x4001100C
|
||||
#define GPIOD_ODR_Addr (GPIOD_BASE+12) //0x4001140C
|
||||
#define GPIOE_ODR_Addr (GPIOE_BASE+12) //0x4001180C
|
||||
#define GPIOF_ODR_Addr (GPIOF_BASE+12) //0x40011A0C
|
||||
#define GPIOG_ODR_Addr (GPIOG_BASE+12) //0x40011E0C
|
||||
|
||||
#define GPIOA_IDR_Addr (GPIOA_BASE+8) //0x40010808
|
||||
#define GPIOB_IDR_Addr (GPIOB_BASE+8) //0x40010C08
|
||||
#define GPIOC_IDR_Addr (GPIOC_BASE+8) //0x40011008
|
||||
#define GPIOD_IDR_Addr (GPIOD_BASE+8) //0x40011408
|
||||
#define GPIOE_IDR_Addr (GPIOE_BASE+8) //0x40011808
|
||||
#define GPIOF_IDR_Addr (GPIOF_BASE+8) //0x40011A08
|
||||
#define GPIOG_IDR_Addr (GPIOG_BASE+8) //0x40011E08
|
||||
|
||||
//IO<49>ڲ<EFBFBD><DAB2><EFBFBD>,ֻ<>Ե<EFBFBD>һ<EFBFBD><D2BB>IO<49><4F>!
|
||||
//ȷ<><C8B7>n<EFBFBD><6E>ֵС<D6B5><D0A1>16!
|
||||
#define PAout(n) BIT_ADDR(GPIOA_ODR_Addr,n) //<2F><><EFBFBD><EFBFBD>
|
||||
#define PAin(n) BIT_ADDR(GPIOA_IDR_Addr,n) //<2F><><EFBFBD><EFBFBD>
|
||||
|
||||
#define PBout(n) BIT_ADDR(GPIOB_ODR_Addr,n) //<2F><><EFBFBD><EFBFBD>
|
||||
#define PBin(n) BIT_ADDR(GPIOB_IDR_Addr,n) //<2F><><EFBFBD><EFBFBD>
|
||||
|
||||
#define PCout(n) BIT_ADDR(GPIOC_ODR_Addr,n) //<2F><><EFBFBD><EFBFBD>
|
||||
#define PCin(n) BIT_ADDR(GPIOC_IDR_Addr,n) //<2F><><EFBFBD><EFBFBD>
|
||||
|
||||
#define PDout(n) BIT_ADDR(GPIOD_ODR_Addr,n) //<2F><><EFBFBD><EFBFBD>
|
||||
#define PDin(n) BIT_ADDR(GPIOD_IDR_Addr,n) //<2F><><EFBFBD><EFBFBD>
|
||||
|
||||
#define PEout(n) BIT_ADDR(GPIOE_ODR_Addr,n) //<2F><><EFBFBD><EFBFBD>
|
||||
#define PEin(n) BIT_ADDR(GPIOE_IDR_Addr,n) //<2F><><EFBFBD><EFBFBD>
|
||||
|
||||
#define PFout(n) BIT_ADDR(GPIOF_ODR_Addr,n) //<2F><><EFBFBD><EFBFBD>
|
||||
#define PFin(n) BIT_ADDR(GPIOF_IDR_Addr,n) //<2F><><EFBFBD><EFBFBD>
|
||||
|
||||
#define PGout(n) BIT_ADDR(GPIOG_ODR_Addr,n) //<2F><><EFBFBD><EFBFBD>
|
||||
#define PGin(n) BIT_ADDR(GPIOG_IDR_Addr,n) //<2F><><EFBFBD><EFBFBD>
|
||||
/////////////////////////////////////////////////////////////////
|
||||
//Ex_NVIC_Configר<67>ö<EFBFBD><C3B6><EFBFBD>
|
||||
#define GPIO_A 0
|
||||
#define GPIO_B 1
|
||||
#define GPIO_C 2
|
||||
#define GPIO_D 3
|
||||
#define GPIO_E 4
|
||||
#define GPIO_F 5
|
||||
#define GPIO_G 6
|
||||
#define FTIR 1 //<2F>½<EFBFBD><C2BD>ش<EFBFBD><D8B4><EFBFBD>
|
||||
#define RTIR 2 //<2F><><EFBFBD><EFBFBD><EFBFBD>ش<EFBFBD><D8B4><EFBFBD>
|
||||
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
Reference in New Issue
Block a user