323 lines
9.3 KiB
C
323 lines
9.3 KiB
C
#ifndef _W5500_H_
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#define _W5500_H_
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#include "main.h"
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/***************** Common Register *****************/
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#define MR 0x0000
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#define RST 0x80
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#define WOL 0x20
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#define PB 0x10
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#define PPP 0x08
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#define FARP 0x02
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#define GAR 0x0001
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#define SUBR 0x0005
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#define SHAR 0x0009
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#define SIPR 0x000f
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#define INTLEVEL 0x0013
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#define IR 0x0015
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#define CONFLICT 0x80
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#define UNREACH 0x40
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#define PPPOE 0x20
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#define MP 0x10
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#define IMR 0x0016
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#define IM_IR7 0x80
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#define IM_IR6 0x40
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#define IM_IR5 0x20
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#define IM_IR4 0x10
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#define SIR 0x0017
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#define S7_INT 0x80
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#define S6_INT 0x40
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#define S5_INT 0x20
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#define S4_INT 0x10
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#define S3_INT 0x08
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#define S2_INT 0x04
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#define S1_INT 0x02
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#define S0_INT 0x01
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#define SIMR 0x0018
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#define S7_IMR 0x80
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#define S6_IMR 0x40
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#define S5_IMR 0x20
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#define S4_IMR 0x10
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#define S3_IMR 0x08
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#define S2_IMR 0x04
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#define S1_IMR 0x02
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#define S0_IMR 0x01
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#define RTR 0x0019
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#define RCR 0x001b
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#define PTIMER 0x001c
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#define PMAGIC 0x001d
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#define PHA 0x001e
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#define PSID 0x0024
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#define PMRU 0x0026
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#define UIPR 0x0028
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#define UPORT 0x002c
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#define PHYCFGR 0x002e
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#define RST_PHY 0x80
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#define OPMODE 0x40
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#define DPX 0x04
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#define SPD 0x02
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#define LINK 0x01
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#define VERR 0x0039
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/********************* Socket Register *******************/
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#define Sn_MR 0x0000
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#define MULTI_MFEN 0x80
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#define BCASTB 0x40
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#define ND_MC_MMB 0x20
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#define UCASTB_MIP6B 0x10
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#define MR_CLOSE 0x00
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#define MR_TCP 0x01
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#define MR_UDP 0x02
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#define MR_MACRAW 0x04
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#define Sn_CR 0x0001
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#define OPEN 0x01
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#define LISTEN 0x02
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#define CONNECT 0x04
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#define DISCON 0x08
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#define CLOSE 0x10
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#define SEND 0x20
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#define SEND_MAC 0x21
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#define SEND_KEEP 0x22
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#define RECV 0x40
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#define Sn_IR 0x0002
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#define IR_SEND_OK 0x10
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#define IR_TIMEOUT 0x08
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#define IR_RECV 0x04
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#define IR_DISCON 0x02
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#define IR_CON 0x01
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#define Sn_SR 0x0003
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#define SOCK_CLOSED 0x00
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#define SOCK_INIT 0x13
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#define SOCK_LISTEN 0x14
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#define SOCK_ESTABLISHED 0x17
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#define SOCK_CLOSE_WAIT 0x1c
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#define SOCK_UDP 0x22
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#define SOCK_MACRAW 0x02
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#define SOCK_SYNSEND 0x15
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#define SOCK_SYNRECV 0x16
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#define SOCK_FIN_WAI 0x18
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#define SOCK_CLOSING 0x1a
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#define SOCK_TIME_WAIT 0x1b
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#define SOCK_LAST_ACK 0x1d
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#define Sn_PORT 0x0004
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#define Sn_DHAR 0x0006
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#define Sn_DIPR 0x000c
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#define Sn_DPORTR 0x0010
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#define Sn_MSSR 0x0012
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#define Sn_TOS 0x0015
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#define Sn_TTL 0x0016
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#define Sn_RXBUF_SIZE 0x001e
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#define Sn_TXBUF_SIZE 0x001f
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#define Sn_TX_FSR 0x0020
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#define Sn_TX_RD 0x0022
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#define Sn_TX_WR 0x0024
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#define Sn_RX_RSR 0x0026
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#define Sn_RX_RD 0x0028
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#define Sn_RX_WR 0x002a
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#define Sn_IMR 0x002c
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#define IMR_SENDOK 0x10
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#define IMR_TIMEOUT 0x08
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#define IMR_RECV 0x04
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#define IMR_DISCON 0x02
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#define IMR_CON 0x01
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#define Sn_FRAG 0x002d
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#define Sn_KPALVTR 0x002f
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/*******************************************************************/
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/************************ SPI Control Byte *************************/
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/*******************************************************************/
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/* Operation mode bits */
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#define VDM 0x00
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#define FDM1 0x01
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#define FDM2 0x02
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#define FDM4 0x03
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/* Read_Write control bit */
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#define RWB_READ 0x00
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#define RWB_WRITE 0x04
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/* Block select bits */
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#define COMMON_R 0x00
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/* Socket 0 */
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#define S0_REG 0x08
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#define S0_TX_BUF 0x10
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#define S0_RX_BUF 0x18
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/* Socket 1 */
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#define S1_REG 0x28
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#define S1_TX_BUF 0x30
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#define S1_RX_BUF 0x38
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/* Socket 2 */
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#define S2_REG 0x48
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#define S2_TX_BUF 0x50
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#define S2_RX_BUF 0x58
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/* Socket 3 */
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#define S3_REG 0x68
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#define S3_TX_BUF 0x70
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#define S3_RX_BUF 0x78
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/* Socket 4 */
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#define S4_REG 0x88
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#define S4_TX_BUF 0x90
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/* Socket 5 */
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#define S5_REG 0xa8
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#define S5_TX_BUF 0xb0
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#define S5_RX_BUF 0xb8
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/* Socket 6 */
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#define S6_REG 0xc8
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#define S6_TX_BUF 0xd0
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#define S6_RX_BUF 0xd8
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/* Socket 7 */
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#define S7_REG 0xe8
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#define S7_TX_BUF 0xf0
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#define S7_RX_BUF 0xf8
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#define TRUE 0xff
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#define FALSE 0x00
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#define S_RX_SIZE 2048 /*<2A><><EFBFBD><EFBFBD>Socket<65><74><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD>Ը<EFBFBD><D4B8><EFBFBD>W5500_RMSR<53><52><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
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#define S_TX_SIZE 2048 /*<2A><><EFBFBD><EFBFBD>Socket<65><74><EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD>Ը<EFBFBD><D4B8><EFBFBD>W5500_TMSR<53><52><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
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/***************----- W5500 GPIO<49><4F><EFBFBD><EFBFBD> -----***************/
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#define W5500_SCS GPIO_PIN_0 // <20><><EFBFBD><EFBFBD>W5500<30><30>CS<43><53><EFBFBD><EFBFBD>
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#define W5500_SCS_PORT GPIOB
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#define W5500_RST GPIO_PIN_4 // <20><><EFBFBD><EFBFBD>W5500<30><30>RST<53><54><EFBFBD><EFBFBD>
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#define W5500_RST_PORT GPIOA
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#define W5500_INT GPIO_PIN_1 // <20><><EFBFBD><EFBFBD>W5500<30><30>INT<4E><54><EFBFBD><EFBFBD>
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#define W5500_INT_PORT GPIOA
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///***************----- <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> -----***************/
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//extern u8 Gateway_IP[4]; // <20><><EFBFBD><EFBFBD>IP<49><50>ַ
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//extern u8 Sub_Mask[4]; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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//extern u8 Phy_Addr[6]; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ(MAC)
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//extern u8 IP_Addr[4]; // <20><><EFBFBD><EFBFBD>IP<49><50>ַ
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//extern u8 S0_Port[2]; // <20>˿<EFBFBD>0<EFBFBD>Ķ˿ں<CBBF>(5000)
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//extern u8 S0_DIP[4]; // <20>˿<EFBFBD>0Ŀ<30><C4BF>IP<49><50>ַ
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//extern u8 S0_DPort[2]; // <20>˿<EFBFBD>0Ŀ<30>Ķ˿ں<CBBF>(6000)
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//extern u8 UDP_DIPR[4]; // UDP(<28>㲥)ģʽ,Ŀ<><C4BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP<49><50>ַ
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//extern u8 UDP_DPORT[2]; // UDP(<28>㲥)ģʽ,Ŀ<><C4BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿ں<CBBF>
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///***************----- <20>˿ڵ<CBBF><DAB5><EFBFBD><EFBFBD><EFBFBD>ģʽ -----***************/
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//extern u8 S0_Mode; // <20>˿<EFBFBD>0<EFBFBD><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ,0:TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ,1:TCP<43>ͻ<EFBFBD><CDBB><EFBFBD>ģʽ,2:UDP(<28>㲥)ģʽ
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//#define TCP_SERVER 0x00 // TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
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//#define TCP_CLIENT 0x01 // TCP<43>ͻ<EFBFBD><CDBB><EFBFBD>ģʽ
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//#define UDP_MODE 0x02 // UDP(<28>㲥)ģʽ
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///***************----- <20>˿ڵ<CBBF><DAB5><EFBFBD><EFBFBD><EFBFBD>״̬ -----***************/
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//extern u8 S0_State; // <20>˿<EFBFBD>0״̬<D7B4><CCAC>¼,1:<3A>˿<EFBFBD><CBBF><EFBFBD><EFBFBD>ɳ<EFBFBD>ʼ<EFBFBD><CABC>,2<>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)
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//#define S_INIT 0x01 // <20>˿<EFBFBD><CBBF><EFBFBD><EFBFBD>ɳ<EFBFBD>ʼ<EFBFBD><CABC>
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//#define S_CONN 0x02 // <20>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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///***************----- <20>˿<EFBFBD><CBBF>շ<EFBFBD><D5B7><EFBFBD><EFBFBD>ݵ<EFBFBD>״̬ -----***************/
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//extern u8 S0_Data; // <20>˿<EFBFBD>0<EFBFBD><30><EFBFBD>պͷ<D5BA><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>״̬,1:<3A>˿ڽ<CBBF><DABD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD>,2:<3A>˿ڷ<CBBF><DAB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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//#define S_RECEIVE 0x01 // <20>˿ڽ<CBBF><DABD>յ<EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>
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//#define S_TRANSMITOK 0x02 // <20>˿ڷ<CBBF><DAB7><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD><DDB0><EFBFBD><EFBFBD><EFBFBD>
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///***************----- <20>˿<EFBFBD><CBBF><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD><EFBFBD> -----***************/
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//extern u8 Rx_Buffer[2048]; // <20>˿ڽ<CBBF><DABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD><EFBFBD>
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//extern u8 Tx_Buffer[2048]; // <20>˿ڷ<CBBF><DAB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD><EFBFBD>
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//extern u8 W5500_Interrupt; // W5500<30>жϱ<D0B6>־(0:<3A><><EFBFBD>ж<EFBFBD>,1:<3A><><EFBFBD>ж<EFBFBD>)
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typedef u8 SOCKET; // <20>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD>˿ں<CBBF><DABA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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// extern void Delay(unsigned int d);//<2F><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>(ms)
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//extern void W5500_GPIO_Configuration(void); // W5500 GPIO<49><4F>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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//extern void W5500_NVIC_Configuration(void); // W5500 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ȼ<EFBFBD><C8BC><EFBFBD><EFBFBD><EFBFBD>
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//extern void SPI_Configuration(void); // W5500 SPI<50><49>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(STM32 SPI1)
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//extern void W5500_Hardware_Reset(void); // Ӳ<><D3B2><EFBFBD><EFBFBD>λW5500
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//extern void W5500_Init(void); // <20><>ʼ<EFBFBD><CABC>W5500<30>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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//extern u8 Detect_Gateway(void); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
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//extern void Socket_Init(SOCKET s); // ָ<><D6B8>Socket(0~7)<29><>ʼ<EFBFBD><CABC>
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//extern u8 Socket_Connect(SOCKET s); // <20><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>Socket(0~7)Ϊ<>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD>̷<EFBFBD><CCB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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//extern u8 Socket_Listen(SOCKET s); // <20><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>Socket(0~7)<29><>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȴ<EFBFBD>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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//extern u8 Socket_UDP(SOCKET s); // <20><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>Socket(0~7)ΪUDPģʽ
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//extern u16 Read_SOCK_Data_Buffer(SOCKET s, u8 *dat_ptr); // ָ<><D6B8>Socket(0~7)<29><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>
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//extern void Write_SOCK_Data_Buffer(SOCKET s, u8 *dat_ptr, u16 size); // ָ<><D6B8>Socket(0~7)<29><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>
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//extern void W5500_Interrupt_Process(void); // W5500<30>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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#define BSP_W5500_PORT_NUM 1
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#define BSP_W5500_DATA_LEN 2048
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typedef struct bsp_W5500_Class_t bsp_W5500_Class_t;
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struct bsp_W5500_Class_t
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{
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SOCKET SocketPort;
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struct
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{
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/***************----- <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> -----***************/
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u8 Gateway_IP[4]; /*<2A><><EFBFBD><EFBFBD>IP<49><50>ַ*/
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u8 Sub_Mask[4]; /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
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u8 Phy_Addr[6]; /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ(MAC)*/
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u8 IP_Addr[4]; /*<2A><><EFBFBD><EFBFBD>IP<49><50>ַ*/
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u8 Port[2]; /*<2A>˿<EFBFBD>0<EFBFBD>Ķ˿ں<CBBF>(5000) */
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u8 DIP[4]; /*<2A>˿<EFBFBD>0Ŀ<30><C4BF>IP<49><50>ַ*/
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u8 DPort[2]; /*<2A>˿<EFBFBD>0Ŀ<30>Ķ˿ں<CBBF>(6000)*/
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u8 UDP_DIPR[4]; /*UDP(<28>㲥)ģʽ,Ŀ<><C4BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP<49><50>ַ*/
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u8 UDP_DPORT[2]; /*UDP(<28>㲥)ģʽ,Ŀ<><C4BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿ں<CBBF>*/
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}ConfigData;
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/***************----- <20>˿ڵ<CBBF><DAB5><EFBFBD><EFBFBD><EFBFBD>ģʽ -----***************/
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u8 Run_Mode;
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/***************----- <20>˿ڵ<CBBF><DAB5><EFBFBD><EFBFBD><EFBFBD>״̬ -----***************/
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u8 Run_State;
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/***************----- <20>˿<EFBFBD><CBBF>շ<EFBFBD><D5B7><EFBFBD><EFBFBD>ݵ<EFBFBD>״̬ -----***********/
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u8 TR_Data_State;
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/***************----- <20>˿<EFBFBD><CBBF><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD><EFBFBD> -----***************/
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u8 Rx_Buffer[BSP_W5500_DATA_LEN]; // <20>˿ڽ<CBBF><DABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD><EFBFBD>
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u8 Tx_Buffer[BSP_W5500_DATA_LEN]; // <20>˿ڷ<CBBF><DAB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD><EFBFBD>
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u8 Interrupt; // W5500<30>жϱ<D0B6>־(0:<3A><><EFBFBD>ж<EFBFBD>,1:<3A><><EFBFBD>ж<EFBFBD>)
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void (*Rx_DataAnalysis)(bsp_W5500_Class_t *,u8 *,u16 );
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};
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typedef struct
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{
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u8 Gateway_IP[4]; /*<2A><><EFBFBD><EFBFBD>IP<49><50>ַ*/
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u8 Sub_Mask[4]; /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
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u8 Phy_Addr[6]; /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ(MAC)*/
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u8 IP_Addr[4]; /*<2A><><EFBFBD><EFBFBD>IP<49><50>ַ*/
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bsp_W5500_Class_t W5500_Class[BSP_W5500_PORT_NUM]; /*<2A>˿ڳ<CBBF>Ա*/
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void (*Interrupt_Process)(void); /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
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void (*Init)(void); /*<2A><>ʼ<EFBFBD><CABC>*/
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void (*Task)(void); /*<2A><><EFBFBD><EFBFBD>*/
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void (*Socket_Send)(bsp_W5500_Class_t *, u8 *, u16 ); /*<2A>˿ڷ<CBBF><DAB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
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}bsp_W5500_t;
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extern bsp_W5500_t W5500;
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#endif
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