update w5500 w25q
This commit is contained in:
247
calib_board/usr/bsp/bsp_DS1302.c
Normal file
247
calib_board/usr/bsp/bsp_DS1302.c
Normal file
@@ -0,0 +1,247 @@
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#include "bsp_DS1302.h"
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#define bsp_DS1302_DELAY() do{ \
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__NOP();__NOP();__NOP();__NOP();\
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__NOP();__NOP();__NOP();__NOP();\
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__NOP();__NOP();__NOP();__NOP();\
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__NOP();__NOP();__NOP();__NOP();\
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__NOP();__NOP();__NOP();__NOP();\
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__NOP();__NOP();__NOP();__NOP();\
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__NOP();__NOP();__NOP();__NOP();\
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}while(0)
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#define RST_CLR HAL_GPIO_WritePin(DS1302_RST_GPIO_Port, DS1302_RST_Pin, GPIO_PIN_RESET )
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#define RST_SET HAL_GPIO_WritePin(DS1302_RST_GPIO_Port, DS1302_RST_Pin, GPIO_PIN_SET )
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#define IO_CLR HAL_GPIO_WritePin(DS1302_DIO_GPIO_Port, DS1302_DIO_Pin, GPIO_PIN_RESET )
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#define IO_SET HAL_GPIO_WritePin(DS1302_DIO_GPIO_Port, DS1302_DIO_Pin, GPIO_PIN_SET )
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#define IO_READ HAL_GPIO_ReadPin (DS1302_DIO_GPIO_Port, DS1302_DIO_Pin )
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#define SCK_CLR HAL_GPIO_WritePin(DS1302_CLK_GPIO_Port, DS1302_CLK_Pin, GPIO_PIN_RESET )
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#define SCK_SET HAL_GPIO_WritePin(DS1302_CLK_GPIO_Port, DS1302_CLK_Pin, GPIO_PIN_SET )
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static void bsp_DS1302Init(void);
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static void bsp_DS1302_Task(void);
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static u8 bsp_DS1302_Set(bsp_DS1302_Time_t *pTime);
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bsp_DS1302_t DS1302 =
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{
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.Init = bsp_DS1302Init,
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.Task = bsp_DS1302_Task,
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.Set = bsp_DS1302_Set,
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};
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bsp_DS1302_t *pDS1302 = &DS1302;
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static void bsp_DS1302DataInput(void)
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{
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GPIO_InitTypeDef GPIO_InitStruct; //<2F><><EFBFBD><EFBFBD>GPIO<49>ṹ<EFBFBD><E1B9B9>
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GPIO_InitStruct.Pin = DS1302_DIO_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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HAL_GPIO_Init(DS1302_DIO_GPIO_Port, &GPIO_InitStruct);
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}
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static void bsp_DS1302DataOutput(void)
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{
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GPIO_InitTypeDef GPIO_InitStruct; //<2F><><EFBFBD><EFBFBD>GPIO<49>ṹ<EFBFBD><E1B9B9>
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GPIO_InitStruct.Pin = DS1302_DIO_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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HAL_GPIO_Init(DS1302_DIO_GPIO_Port, &GPIO_InitStruct);
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}
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/*<2A><>bsp_DS1302д<32><D0B4>һ<EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>*/
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static void bsp_DS1302_write_byte(u8 Addr, u8 Data)
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{
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u8 i;
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RST_SET; /*<2A><><EFBFBD><EFBFBD>bsp_DS1302<30><32><EFBFBD><EFBFBD>*/
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bsp_DS1302_DELAY();
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/*д<><D0B4>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>addr*/
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Addr = Addr & 0xFE;/*<2A><><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>*/
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for (i = 0; i < 8; i++)
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{
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if (Addr & 0x01)
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{
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IO_SET;
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}
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else
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{
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IO_CLR;
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}
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bsp_DS1302_DELAY();
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SCK_SET;
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bsp_DS1302_DELAY();
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SCK_CLR;
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bsp_DS1302_DELAY();
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Addr = Addr >> 1;
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}
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/*д<><D0B4><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD>d*/
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for (i = 0; i < 8; i++)
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{
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if (Data & 0x01)
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{
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IO_SET;
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}
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else
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{
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IO_CLR;
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}
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bsp_DS1302_DELAY();
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SCK_SET;
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bsp_DS1302_DELAY();
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SCK_CLR;
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bsp_DS1302_DELAY();
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Data = Data >> 1;
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}
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RST_CLR; /*ֹͣbsp_DS1302<30><32><EFBFBD><EFBFBD>*/
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bsp_DS1302_DELAY();
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}
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/*<2A><>bsp_DS1302<30><32><EFBFBD><EFBFBD>һ<EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>*/
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static u8 bsp_DS1302_read_byte(u8 Addr)
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{
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u8 i;
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u8 temp;
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RST_SET; /*<2A><><EFBFBD><EFBFBD>bsp_DS1302<30><32><EFBFBD><EFBFBD>*/
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bsp_DS1302_DELAY();
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/*д<><D0B4>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>addr*/
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Addr = Addr | 0x01;/*<2A><><EFBFBD><EFBFBD>λ<EFBFBD>ø<EFBFBD>*/
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for (i = 0; i < 8; i++)
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{
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if (Addr & 0x01)
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{
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IO_SET;
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}
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else
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{
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IO_CLR;
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}
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bsp_DS1302_DELAY();
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SCK_SET;
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bsp_DS1302_DELAY();
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SCK_CLR;
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bsp_DS1302_DELAY();
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Addr = Addr >> 1;
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}
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bsp_DS1302DataInput();
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/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD>temp*/
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for (i = 0; i < 8; i++)
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{
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temp = temp >> 1;
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if (IO_READ)
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{
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temp |= 0x80;
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}
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else
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{
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temp &= 0x7F;
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}
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bsp_DS1302_DELAY();
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SCK_SET;
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bsp_DS1302_DELAY();
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SCK_CLR;
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bsp_DS1302_DELAY();
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}
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RST_CLR; /*ֹͣbsp_DS1302<30><32><EFBFBD><EFBFBD>*/
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bsp_DS1302_DELAY();
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bsp_DS1302DataOutput();
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return temp;
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}
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static u8 HexToBCD(u8 code)
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{
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u8 temp;
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temp = ((code / 10) << 4) + (code % 10);
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return temp;
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}
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static u8 bsp_DS1302_Set(bsp_DS1302_Time_t *pTime)
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{
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if ((pDS1302->Time.Year > 99) || (pDS1302->Time.Month > 12) || (pDS1302->Time.Day > 31) ||
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(pDS1302->Time.Hour > 23) || (pDS1302->Time.Minute > 59) || (pDS1302->Time.Second > 59))
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{
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return USR_FALSE;
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}
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else
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{
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bsp_DS1302_write_byte(BSP_DS1302_CONTROL_ADDR, 0x00); //<2F>ر<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>
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bsp_DS1302_write_byte(BSP_DS1302_SEC_ADDR, 0x80); //<2F><>ͣ
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bsp_DS1302_write_byte(BSP_DS1302_YEAR_ADDR, HexToBCD(pTime->Year));
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bsp_DS1302_write_byte(BSP_DS1302_MONTH_ADDR, HexToBCD(pTime->Month));
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bsp_DS1302_write_byte(BSP_DS1302_DATA_ADDR, HexToBCD(pTime->Day));
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bsp_DS1302_write_byte(BSP_DS1302_HOUR_ADDR, HexToBCD(pTime->Hour));
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bsp_DS1302_write_byte(BSP_DS1302_MIN_ADDR, HexToBCD(pTime->Minute));
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bsp_DS1302_write_byte(BSP_DS1302_SEC_ADDR, HexToBCD(pTime->Second));
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bsp_DS1302_write_byte(BSP_DS1302_CONTROL_ADDR, 0x80); //<2F><><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>
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return USR_TRUE;
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}
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}
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static void bsp_DS1302_Task(void)
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{
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u8 RegData;
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RegData = bsp_DS1302_read_byte(BSP_DS1302_YEAR_ADDR);
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pDS1302->Time.Year = (RegData / 16) * 10 + RegData % 16;
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RegData = bsp_DS1302_read_byte(BSP_DS1302_MONTH_ADDR);
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pDS1302->Time.Month = (RegData / 16) * 10 + RegData % 16;
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RegData = bsp_DS1302_read_byte(BSP_DS1302_DATA_ADDR);
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pDS1302->Time.Day = (RegData / 16) * 10 + RegData % 16;
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RegData = bsp_DS1302_read_byte(BSP_DS1302_HOUR_ADDR);
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pDS1302->Time.Hour = (RegData / 16) * 10 + RegData % 16;
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RegData = bsp_DS1302_read_byte(BSP_DS1302_MIN_ADDR);
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pDS1302->Time.Minute = (RegData / 16) * 10 + RegData % 16;
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RegData = bsp_DS1302_read_byte(BSP_DS1302_SEC_ADDR);
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pDS1302->Time.Second = (RegData / 16) * 10 + RegData % 16;
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}
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static void bsp_DS1302Init(void)
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{
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RST_SET;
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SCK_CLR;
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bsp_DS1302_Task();
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if ((pDS1302->Time.Year > 99) || (pDS1302->Time.Month > 12) || (pDS1302->Time.Day > 31) ||
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(pDS1302->Time.Hour > 23) || (pDS1302->Time.Minute > 59) || (pDS1302->Time.Second > 59))
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{
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pDS1302->Time.Year = 25;
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pDS1302->Time.Month = 1;
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pDS1302->Time.Day = 1;
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pDS1302->Time.Hour = 0;
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pDS1302->Time.Minute = 0;
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pDS1302->Time.Second = 0;
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bsp_DS1302_Set(&pDS1302->Time);
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}
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}
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206
calib_board/usr/bsp/bsp_DS1302.c.orig
Normal file
206
calib_board/usr/bsp/bsp_DS1302.c.orig
Normal file
@@ -0,0 +1,206 @@
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#include "bsp_DS1302.h"
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#define bsp_DS1302_DELAY() do{ \
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__NOP();__NOP();__NOP();__NOP();\
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__NOP();__NOP();__NOP();__NOP();\
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__NOP();__NOP();__NOP();__NOP();\
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__NOP();__NOP();__NOP();__NOP();\
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__NOP();__NOP();__NOP();__NOP();\
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}while(0)
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#define RST_CLR HAL_GPIO_WritePin(DS1302_RST_GPIO_Port, DS1302_RST_Pin, GPIO_PIN_RESET )
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#define RST_SET HAL_GPIO_WritePin(DS1302_RST_GPIO_Port, DS1302_RST_Pin, GPIO_PIN_SET )
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#define IO_CLR HAL_GPIO_WritePin(DS1302_DIO_GPIO_Port, DS1302_DIO_Pin, GPIO_PIN_RESET )
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#define IO_SET HAL_GPIO_WritePin(DS1302_DIO_GPIO_Port, DS1302_DIO_Pin, GPIO_PIN_SET )
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#define IO_READ HAL_GPIO_ReadPin (DS1302_DIO_GPIO_Port, DS1302_DIO_Pin )
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#define SCK_CLR HAL_GPIO_WritePin(DS1302_CLK_GPIO_Port, DS1302_CLK_Pin, GPIO_PIN_RESET )
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#define SCK_SET HAL_GPIO_WritePin(DS1302_CLK_GPIO_Port, DS1302_CLK_Pin, GPIO_PIN_SET )
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static void bsp_DS1302Init(void);
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static void bsp_DS1302_Task(void);
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static void bsp_DS1302_Set(bsp_DS1302_Time_t *pTime);
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bsp_DS1302_t DS1302 =
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{
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.Init = bsp_DS1302Init,
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.Task = bsp_DS1302_Task,
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.Set = bsp_DS1302_Set,
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};
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bsp_DS1302_t *pDS1302 = &DS1302;
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static void bsp_DS1302DataInput(void)
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{
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GPIO_InitTypeDef GPIO_InitStruct; //<2F><><EFBFBD><EFBFBD>GPIO<49>ṹ<EFBFBD><E1B9B9>
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GPIO_InitStruct.Pin = DS1302_DIO_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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HAL_GPIO_Init(DS1302_DIO_GPIO_Port, &GPIO_InitStruct);
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}
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static void bsp_DS1302DataOutput(void)
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{
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GPIO_InitTypeDef GPIO_InitStruct; //<2F><><EFBFBD><EFBFBD>GPIO<49>ṹ<EFBFBD><E1B9B9>
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GPIO_InitStruct.Pin = DS1302_DIO_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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HAL_GPIO_Init(DS1302_DIO_GPIO_Port, &GPIO_InitStruct);
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}
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/*<2A><>bsp_DS1302д<32><D0B4>һ<EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>*/
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static void bsp_DS1302_write_byte(u8 Addr, u8 Data)
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{
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u8 i;
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RST_SET; /*<2A><><EFBFBD><EFBFBD>bsp_DS1302<30><32><EFBFBD><EFBFBD>*/
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bsp_DS1302_DELAY();
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/*д<><D0B4>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>addr*/
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Addr = Addr & 0xFE;/*<2A><><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>*/
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for(i=0; i<8; i++){
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if(Addr&0x01) IO_SET;
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else IO_CLR;
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bsp_DS1302_DELAY();
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SCK_SET;
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bsp_DS1302_DELAY();
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SCK_CLR;
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bsp_DS1302_DELAY();
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Addr = Addr >> 1;
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}
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/*д<><D0B4><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD>d*/
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for(i=0; i<8; i++){
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if(Data&0x01) IO_SET;
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else IO_CLR;
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bsp_DS1302_DELAY();
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SCK_SET;
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bsp_DS1302_DELAY();
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SCK_CLR;
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bsp_DS1302_DELAY();
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Data = Data >> 1;
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}
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RST_CLR; /*ֹͣbsp_DS1302<30><32><EFBFBD><EFBFBD>*/
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bsp_DS1302_DELAY();
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}
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/*<2A><>bsp_DS1302<30><32><EFBFBD><EFBFBD>һ<EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>*/
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static u8 bsp_DS1302_read_byte(u8 Addr)
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{
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u8 i;
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u8 temp;
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RST_SET; /*<2A><><EFBFBD><EFBFBD>bsp_DS1302<30><32><EFBFBD><EFBFBD>*/
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bsp_DS1302_DELAY();
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/*д<><D0B4>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>addr*/
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Addr = Addr | 0x01;/*<2A><><EFBFBD><EFBFBD>λ<EFBFBD>ø<EFBFBD>*/
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for(i=0; i<8; i++)
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{
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if(Addr&0x01)
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{
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IO_SET;
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}
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else
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{
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IO_CLR;
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}
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bsp_DS1302_DELAY();
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SCK_SET;
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bsp_DS1302_DELAY();
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SCK_CLR;
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bsp_DS1302_DELAY();
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Addr = Addr >> 1;
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}
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bsp_DS1302DataInput();
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/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD>temp*/
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for(i=0; i<8; i++)
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{
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temp = temp>>1;
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if(IO_READ) temp |= 0x80;
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else temp&=0x7F;
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bsp_DS1302_DELAY();
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SCK_SET;
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bsp_DS1302_DELAY();
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SCK_CLR;
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bsp_DS1302_DELAY();
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}
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RST_CLR; /*ֹͣbsp_DS1302<30><32><EFBFBD><EFBFBD>*/
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bsp_DS1302_DELAY();
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bsp_DS1302DataOutput();
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return temp;
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}
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||||
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static u8 HexToBCD(u8 code)
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||||
{
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||||
u8 temp;
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||||
temp = ((code / 10)<<4)+(code % 10);
|
||||
return temp;
|
||||
}
|
||||
|
||||
static void bsp_DS1302_Set(bsp_DS1302_Time_t *pTime)
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||||
{
|
||||
bsp_DS1302_write_byte(BSP_DS1302_CONTROL_ADDR,0x00); //<2F>ر<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>
|
||||
bsp_DS1302_write_byte(BSP_DS1302_SEC_ADDR,0x80); //<2F><>ͣ
|
||||
|
||||
bsp_DS1302_write_byte(BSP_DS1302_YEAR_ADDR, HexToBCD(pTime->Year));
|
||||
bsp_DS1302_write_byte(BSP_DS1302_MONTH_ADDR, HexToBCD(pTime->Month));
|
||||
bsp_DS1302_write_byte(BSP_DS1302_DATA_ADDR, HexToBCD(pTime->Day));
|
||||
bsp_DS1302_write_byte(BSP_DS1302_HOUR_ADDR, HexToBCD(pTime->Hour));
|
||||
bsp_DS1302_write_byte(BSP_DS1302_MIN_ADDR, HexToBCD(pTime->Minute));
|
||||
bsp_DS1302_write_byte(BSP_DS1302_SEC_ADDR, HexToBCD(pTime->Second));
|
||||
|
||||
bsp_DS1302_write_byte(BSP_DS1302_CONTROL_ADDR,0x80); //<2F><><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
static void bsp_DS1302_Task(void)
|
||||
{
|
||||
u8 RegData;
|
||||
|
||||
RegData = bsp_DS1302_read_byte(BSP_DS1302_YEAR_ADDR);
|
||||
pDS1302->Time.Year = (RegData/16)*10 + RegData%16;
|
||||
|
||||
RegData = bsp_DS1302_read_byte(BSP_DS1302_MONTH_ADDR);
|
||||
pDS1302->Time.Month = (RegData/16)*10 + RegData%16;
|
||||
|
||||
RegData = bsp_DS1302_read_byte(BSP_DS1302_DATA_ADDR);
|
||||
pDS1302->Time.Day = (RegData/16)*10 + RegData%16;
|
||||
|
||||
RegData = bsp_DS1302_read_byte(BSP_DS1302_HOUR_ADDR);
|
||||
pDS1302->Time.Hour = (RegData/16)*10 + RegData%16;
|
||||
|
||||
RegData = bsp_DS1302_read_byte(BSP_DS1302_MIN_ADDR);
|
||||
pDS1302->Time.Minute = (RegData/16)*10 + RegData%16;
|
||||
|
||||
RegData = bsp_DS1302_read_byte(BSP_DS1302_SEC_ADDR);
|
||||
pDS1302->Time.Second = (RegData/16)*10 + RegData%16;
|
||||
|
||||
}
|
||||
|
||||
static void bsp_DS1302Init(void)
|
||||
{
|
||||
RST_SET;
|
||||
SCK_CLR;
|
||||
bsp_DS1302_Task();
|
||||
if((pDS1302->Time.Year>99)||(pDS1302->Time.Month>12)||(pDS1302->Time.Day>31)||
|
||||
(pDS1302->Time.Hour>23)||(pDS1302->Time.Minute>59)||(pDS1302->Time.Second>59))
|
||||
{
|
||||
pDS1302->Time.Year = 25;
|
||||
pDS1302->Time.Month = 1;
|
||||
pDS1302->Time.Day = 1;
|
||||
pDS1302->Time.Hour = 0;
|
||||
pDS1302->Time.Minute = 0;
|
||||
pDS1302->Time.Second = 0;
|
||||
bsp_DS1302_Set(&pDS1302->Time);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
38
calib_board/usr/bsp/bsp_DS1302.h
Normal file
38
calib_board/usr/bsp/bsp_DS1302.h
Normal file
@@ -0,0 +1,38 @@
|
||||
#ifndef __BSP_DS1302_H__
|
||||
#define __BSP_DS1302_H__
|
||||
|
||||
#include "main.h"
|
||||
#include "usr_config.h"
|
||||
|
||||
#define BSP_DS1302_SEC_ADDR 0x80 //<2F><><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>ַ
|
||||
#define BSP_DS1302_MIN_ADDR 0x82 //<2F><><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>ַ
|
||||
#define BSP_DS1302_HOUR_ADDR 0x84 //ʱ<><CAB1><EFBFBD>ݵ<EFBFBD>ַ
|
||||
#define BSP_DS1302_DATA_ADDR 0x86 //<2F><><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>ַ
|
||||
#define BSP_DS1302_MONTH_ADDR 0x88 //<2F><><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>ַ
|
||||
#define BSP_DS1302_DAY_ADDR 0x8a //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>ַ
|
||||
#define BSP_DS1302_YEAR_ADDR 0x8c //<2F><><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>ַ
|
||||
#define BSP_DS1302_CONTROL_ADDR 0x8e //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>ַ
|
||||
#define BSP_DS1302_CHARGER_ADDR 0x90
|
||||
#define BSP_DS1302_CLKBURST_ADDR 0xbe
|
||||
|
||||
typedef struct
|
||||
{
|
||||
u16 Year;
|
||||
u8 Month;
|
||||
u8 Day;
|
||||
u8 Hour;
|
||||
u8 Minute;
|
||||
u8 Second;
|
||||
}bsp_DS1302_Time_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
bsp_DS1302_Time_t Time;
|
||||
void (*Init)(void);
|
||||
u8 (*Set)(bsp_DS1302_Time_t *);
|
||||
void (*Task)(void);
|
||||
}bsp_DS1302_t;
|
||||
|
||||
extern bsp_DS1302_t DS1302;//ϵͳʱ<CDB3><CAB1>
|
||||
|
||||
#endif
|
||||
808
calib_board/usr/bsp/bsp_W5500.c
Normal file
808
calib_board/usr/bsp/bsp_W5500.c
Normal file
@@ -0,0 +1,808 @@
|
||||
/**********************************************************************************
|
||||
* <20>ļ<EFBFBD><C4BC><EFBFBD> <20><>W5500.c
|
||||
* <20><><EFBFBD><EFBFBD> <20><>W5500 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD>汾 <20><>ST_v3.5
|
||||
* <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>ģ<EFBFBD>鿪<EFBFBD><E9BFAA><EFBFBD>Ŷ<EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> <20><>http://nirenelec.blog.163.com
|
||||
* <20>Ա<EFBFBD> <20><>http://nirenelec.taobao.com
|
||||
**********************************************************************************/
|
||||
|
||||
//#include "stm32f1xx.h"
|
||||
//#include "stm32f1xx_hal_spi.h"
|
||||
#include "main.h"
|
||||
|
||||
#include "bsp_W5500.h"
|
||||
#include "usart.h"
|
||||
#include "stdio.h"
|
||||
#include "spi.h"
|
||||
//#include "bsp_print.h"
|
||||
|
||||
|
||||
#define BSP_W5500_SPI_CS_LOW
|
||||
|
||||
|
||||
/*Run_Mode <20>˿ڵ<CBBF><DAB5><EFBFBD><EFBFBD><EFBFBD>ģʽ*/
|
||||
#define BSP_W5500_PORT_RUN_MODE_TCP_SERVER 0x00 /*TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ*/
|
||||
#define BSP_W5500_PORT_RUN_MODE_TCP_CLIENT 0x01 /*TCP<43>ͻ<EFBFBD><CDBB><EFBFBD>ģʽ*/
|
||||
#define BSP_W5500_PORT_RUN_MODE_UDP 0x02 /*UDP(<28>㲥)ģʽ*/
|
||||
|
||||
/*Run_State <20>˿ڵ<CBBF><DAB5><EFBFBD><EFBFBD><EFBFBD>״̬ BITλ*/
|
||||
#define BSP_W5500_PORT_RUN_STATE_INIT 0x01 /*<2A>˿<EFBFBD><CBBF><EFBFBD><EFBFBD>ɳ<EFBFBD>ʼ<EFBFBD><CABC>*/
|
||||
#define BSP_W5500_PORT_RUN_STATE_CONN 0x02 /*<2A>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
|
||||
/*TR_Data_State <20>˿ڵ<CBBF><DAB5>շ<EFBFBD><D5B7><EFBFBD><EFBFBD><EFBFBD>״̬*/
|
||||
#define BSP_W5500_PORT_DATA_RECEIVE 0x01 /*<2A>˿ڽ<CBBF><DABD>յ<EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>*/
|
||||
#define BSP_W5500_PORT_DATA_TRANSMITOK 0x02 /*<2A>˿ڷ<CBBF><DAB7><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD><DDB0><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
|
||||
static void bsp_W5500_Interrupt_Process(void);
|
||||
static void bsp_W5500_Init(void);
|
||||
static void bsp_W5500_Task(void);
|
||||
static void Write_SOCK_Data_Buffer(bsp_W5500_Class_t *pW5500_Class, u8 *dat_ptr, u16 size);
|
||||
|
||||
bsp_W5500_t W5500 =
|
||||
{
|
||||
.Gateway_IP = {192,168,1,1},
|
||||
.Sub_Mask = {255,255,255,0},
|
||||
.Phy_Addr = {0x0c,0x29,0xab,0x7c,0x00,0x01},
|
||||
|
||||
//.IP_Addr = {169,254,107,101},
|
||||
.IP_Addr = {192,168,1,101},
|
||||
|
||||
.Interrupt_Process = bsp_W5500_Interrupt_Process,
|
||||
|
||||
.Init = bsp_W5500_Init,
|
||||
.Task = bsp_W5500_Task,
|
||||
.Socket_Send = Write_SOCK_Data_Buffer,
|
||||
|
||||
.W5500_Class[0] =
|
||||
{
|
||||
.SocketPort = 0, /*ʹ<>ö˿<C3B6>0*/
|
||||
.ConfigData.Gateway_IP = {192,168,1,1},
|
||||
.ConfigData.Sub_Mask = {255,255,255,0},
|
||||
.ConfigData.Phy_Addr = {0x0c,0x29,0xab,0x7c,0x00,0x01},
|
||||
|
||||
.ConfigData.IP_Addr = {192,168,1,101},
|
||||
.ConfigData.Port = {0x13,0x88},
|
||||
|
||||
// .ConfigData.DIP = {192,168,1,32},
|
||||
// .ConfigData.DPort = {0x03,0x09},
|
||||
|
||||
.Run_Mode = BSP_W5500_PORT_RUN_MODE_TCP_SERVER,
|
||||
// .Rx_DataAnalysis = proto_HSMS_Rx_DataAnalysis,
|
||||
},
|
||||
};
|
||||
|
||||
bsp_W5500_t *pW5500 = &W5500;
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : SPI1_Send_Byte
|
||||
* <20><><EFBFBD><EFBFBD> : SPI1<49><31><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : dat:<3A><><EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD><CDB5><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
void SPI1_Send_Byte(u8 dat)
|
||||
{
|
||||
// hspi1.Instance->DR=dat;
|
||||
HAL_SPI_Transmit(&hspi1, &dat, 1, 0xff);
|
||||
// while(__HAL_SPI_GET_FLAG(&hspi1,SPI_FLAG_TXE)==RESET);
|
||||
// SPI_I2S_SendData(SPI1,dat);//д1<D0B4><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// while(SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET);//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD>ݼĴ<DDBC><C4B4><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : SPI1_Send_Short
|
||||
* <20><><EFBFBD><EFBFBD> : SPI1<49><31><EFBFBD><EFBFBD>2<EFBFBD><32><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>(16λ)
|
||||
* <20><><EFBFBD><EFBFBD> : dat:<3A><><EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD>16λ<36><CEBB><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
void SPI1_Send_Short(u16 dat)
|
||||
{
|
||||
SPI1_Send_Byte(dat >> 8); // д<><D0B4><EFBFBD>ݸ<EFBFBD>λ
|
||||
SPI1_Send_Byte(dat); // д<><D0B4><EFBFBD>ݵ<EFBFBD>λ
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Write_W5500_1Byte
|
||||
* <20><><EFBFBD><EFBFBD> : ͨ<><CDA8>SPI1<49><31>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>д1<D0B4><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : reg:16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ,dat:<3A><>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
void Write_W5500_1Byte(u16 reg, u8 dat)
|
||||
{
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(reg); // ͨ<><CDA8>SPI1д16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
SPI1_Send_Byte(FDM1 | RWB_WRITE | COMMON_R); // ͨ<><CDA8>SPI1д<31><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,1<><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,д<><D0B4><EFBFBD><EFBFBD>,ѡ<><D1A1>ͨ<EFBFBD>üĴ<C3BC><C4B4><EFBFBD>
|
||||
SPI1_Send_Byte(dat); // д1<D0B4><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Write_W5500_2Byte
|
||||
* <20><><EFBFBD><EFBFBD> : ͨ<><CDA8>SPI1<49><31>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>д2<D0B4><32><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : reg:16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ,dat:16λ<36><CEBB>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(2<><32><EFBFBD>ֽ<EFBFBD>)
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
void Write_W5500_2Byte(u16 reg, u16 dat)
|
||||
{
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(reg); // ͨ<><CDA8>SPI1д16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
SPI1_Send_Byte(FDM2 | RWB_WRITE | COMMON_R); // ͨ<><CDA8>SPI1д<31><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,2<><32><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,д<><D0B4><EFBFBD><EFBFBD>,ѡ<><D1A1>ͨ<EFBFBD>üĴ<C3BC><C4B4><EFBFBD>
|
||||
SPI1_Send_Short(dat); // д16λ<36><CEBB><EFBFBD><EFBFBD>
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Write_W5500_nByte
|
||||
* <20><><EFBFBD><EFBFBD> : ͨ<><CDA8>SPI1<49><31>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>дn<D0B4><6E><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : reg:16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ,*dat_ptr:<3A><>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>,size:<3A><>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
void Write_W5500_nByte(u16 reg, u8 *dat_ptr, u16 size)
|
||||
{
|
||||
u16 i;
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(reg); // ͨ<><CDA8>SPI1д16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
SPI1_Send_Byte(VDM | RWB_WRITE | COMMON_R); // ͨ<><CDA8>SPI1д<31><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,N<><4E><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,д<><D0B4><EFBFBD><EFBFBD>,ѡ<><D1A1>ͨ<EFBFBD>üĴ<C3BC><C4B4><EFBFBD>
|
||||
|
||||
for (i = 0; i < size; i++) // ѭ<><D1AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>size<7A><65><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4>W5500
|
||||
{
|
||||
SPI1_Send_Byte(*dat_ptr++); // дһ<D0B4><D2BB><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Write_W5500_SOCK_1Byte
|
||||
* <20><><EFBFBD><EFBFBD> : ͨ<><CDA8>SPI1<49><31>ָ<EFBFBD><D6B8><EFBFBD>˿ڼĴ<DABC><C4B4><EFBFBD>д1<D0B4><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : s:<3A>˿ں<CBBF>,reg:16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ,dat:<3A><>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
void Write_W5500_SOCK_1Byte(SOCKET s, u16 reg, u8 dat)
|
||||
{
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(reg); // ͨ<><CDA8>SPI1д16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
SPI1_Send_Byte(FDM1 | RWB_WRITE | (s * 0x20 + 0x08)); // ͨ<><CDA8>SPI1д<31><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,1<><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,д<><D0B4><EFBFBD><EFBFBD>,ѡ<><D1A1><EFBFBD>˿<EFBFBD>s<EFBFBD>ļĴ<C4BC><C4B4><EFBFBD>
|
||||
SPI1_Send_Byte(dat); // д1<D0B4><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Write_W5500_SOCK_2Byte
|
||||
* <20><><EFBFBD><EFBFBD> : ͨ<><CDA8>SPI1<49><31>ָ<EFBFBD><D6B8><EFBFBD>˿ڼĴ<DABC><C4B4><EFBFBD>д2<D0B4><32><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : s:<3A>˿ں<CBBF>,reg:16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ,dat:16λ<36><CEBB>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(2<><32><EFBFBD>ֽ<EFBFBD>)
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
void Write_W5500_SOCK_2Byte(SOCKET s, u16 reg, u16 dat)
|
||||
{
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(reg); // ͨ<><CDA8>SPI1д16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
SPI1_Send_Byte(FDM2 | RWB_WRITE | (s * 0x20 + 0x08)); // ͨ<><CDA8>SPI1д<31><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,2<><32><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,д<><D0B4><EFBFBD><EFBFBD>,ѡ<><D1A1><EFBFBD>˿<EFBFBD>s<EFBFBD>ļĴ<C4BC><C4B4><EFBFBD>
|
||||
SPI1_Send_Short(dat); // д16λ<36><CEBB><EFBFBD><EFBFBD>
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Write_W5500_SOCK_4Byte
|
||||
* <20><><EFBFBD><EFBFBD> : ͨ<><CDA8>SPI1<49><31>ָ<EFBFBD><D6B8><EFBFBD>˿ڼĴ<DABC><C4B4><EFBFBD>д4<D0B4><34><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : s:<3A>˿ں<CBBF>,reg:16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ,*dat_ptr:<3A><>д<EFBFBD><D0B4><EFBFBD><EFBFBD>4<EFBFBD><34><EFBFBD>ֽڻ<D6BD><DABB><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
void Write_W5500_SOCK_4Byte(SOCKET s, u16 reg, u8 *dat_ptr)
|
||||
{
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(reg); // ͨ<><CDA8>SPI1д16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
SPI1_Send_Byte(FDM4 | RWB_WRITE | (s * 0x20 + 0x08)); // ͨ<><CDA8>SPI1д<31><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,4<><34><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,д<><D0B4><EFBFBD><EFBFBD>,ѡ<><D1A1><EFBFBD>˿<EFBFBD>s<EFBFBD>ļĴ<C4BC><C4B4><EFBFBD>
|
||||
|
||||
SPI1_Send_Byte(*dat_ptr++); // д<><D0B4>1<EFBFBD><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SPI1_Send_Byte(*dat_ptr++); // д<><D0B4>2<EFBFBD><32><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SPI1_Send_Byte(*dat_ptr++); // д<><D0B4>3<EFBFBD><33><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SPI1_Send_Byte(*dat_ptr++); // д<><D0B4>4<EFBFBD><34><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Read_W5500_1Byte
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>W5500ָ<30><D6B8><EFBFBD><EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : reg:16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>ȡ<EFBFBD><C8A1><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
u8 Read_W5500_1Byte(u16 reg)
|
||||
{
|
||||
u8 i;
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(reg); // ͨ<><CDA8>SPI1д16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
SPI1_Send_Byte(FDM1 | RWB_READ | COMMON_R); // ͨ<><CDA8>SPI1д<31><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,1<><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,ѡ<><D1A1>ͨ<EFBFBD>üĴ<C3BC><C4B4><EFBFBD>
|
||||
i = hspi1.Instance->DR;
|
||||
// HAL_SPI_Receive(&hspi1,&i,1,0xf);
|
||||
// i=SPI_I2S_ReceiveData(SPI1);
|
||||
SPI1_Send_Byte(0x00); // <20><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
i = hspi1.Instance->DR;
|
||||
// HAL_SPI_Receive(&hspi1,&i,1,0xf);
|
||||
|
||||
// i=SPI_I2S_ReceiveData(SPI1);//<2F><>ȡ1<C8A1><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
return i; // <20><><EFBFBD>ض<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>ļĴ<C4BC><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Read_W5500_SOCK_1Byte
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>W5500ָ<30><D6B8><EFBFBD>˿ڼĴ<DABC><C4B4><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : s:<3A>˿ں<CBBF>,reg:16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>ȡ<EFBFBD><C8A1><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
u8 Read_W5500_SOCK_1Byte(SOCKET s, u16 reg)
|
||||
{
|
||||
u8 i;
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(reg); // ͨ<><CDA8>SPI1д16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
SPI1_Send_Byte(FDM1 | RWB_READ | (s * 0x20 + 0x08)); // ͨ<><CDA8>SPI1д<31><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,1<><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,ѡ<><D1A1><EFBFBD>˿<EFBFBD>s<EFBFBD>ļĴ<C4BC><C4B4><EFBFBD>
|
||||
|
||||
i = hspi1.Instance->DR;
|
||||
// i=SPI_I2S_ReceiveData(SPI1);
|
||||
SPI1_Send_Byte(0x00); // <20><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
i = hspi1.Instance->DR;
|
||||
// i=SPI_I2S_ReceiveData(SPI1);//<2F><>ȡ1<C8A1><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
return i; // <20><><EFBFBD>ض<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>ļĴ<C4BC><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Read_W5500_SOCK_2Byte
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>W5500ָ<30><D6B8><EFBFBD>˿ڼĴ<DABC><C4B4><EFBFBD><EFBFBD><EFBFBD>2<EFBFBD><32><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : s:<3A>˿ں<CBBF>,reg:16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>ȡ<EFBFBD><C8A1><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>2<EFBFBD><32><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>(16λ)
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
u16 Read_W5500_SOCK_2Byte(SOCKET s, u16 reg)
|
||||
{
|
||||
u16 i;
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(reg); // ͨ<><CDA8>SPI1д16λ<36>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
SPI1_Send_Byte(FDM2 | RWB_READ | (s * 0x20 + 0x08)); // ͨ<><CDA8>SPI1д<31><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,2<><32><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,ѡ<><D1A1><EFBFBD>˿<EFBFBD>s<EFBFBD>ļĴ<C4BC><C4B4><EFBFBD>
|
||||
|
||||
i = hspi1.Instance->DR;
|
||||
// i=SPI_I2S_ReceiveData(SPI1);
|
||||
SPI1_Send_Byte(0x00); // <20><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
i = hspi1.Instance->DR;
|
||||
// i=SPI_I2S_ReceiveData(SPI1);//<2F><>ȡ<EFBFBD><C8A1>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
SPI1_Send_Byte(0x00); // <20><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
i *= 256;
|
||||
i += hspi1.Instance->DR;
|
||||
// i+=SPI_I2S_ReceiveData(SPI1);//<2F><>ȡ<EFBFBD><C8A1>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
return i; // <20><><EFBFBD>ض<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>ļĴ<C4BC><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Read_SOCK_Data_Buffer
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>W5500<30><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : s:<3A>˿ں<CBBF>,*dat_ptr:<3A><><EFBFBD>ݱ<EFBFBD><DDB1>滺<EFBFBD><E6BBBA><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,rx_size<7A><65><EFBFBD>ֽ<EFBFBD>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
u16 Read_SOCK_Data_Buffer(SOCKET s, u8 *dat_ptr)
|
||||
{
|
||||
u16 rx_size;
|
||||
u16 offset, offset1;
|
||||
u16 i;
|
||||
u8 j;
|
||||
|
||||
rx_size = Read_W5500_SOCK_2Byte(s, Sn_RX_RSR);
|
||||
if (rx_size == 0)
|
||||
return 0; // û<><C3BB><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
if (rx_size > 1460)
|
||||
rx_size = 1460;
|
||||
|
||||
offset = Read_W5500_SOCK_2Byte(s, Sn_RX_RD);
|
||||
offset1 = offset;
|
||||
offset &= (S_RX_SIZE - 1); // <20><><EFBFBD><EFBFBD>ʵ<EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(offset); // д16λ<36><CEBB>ַ
|
||||
SPI1_Send_Byte(VDM | RWB_READ | (s * 0x20 + 0x18)); // д<><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,N<><4E><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,ѡ<><D1A1><EFBFBD>˿<EFBFBD>s<EFBFBD>ļĴ<C4BC><C4B4><EFBFBD>
|
||||
j = hspi1.Instance->DR;
|
||||
// j=SPI_I2S_ReceiveData(SPI1);
|
||||
|
||||
if ((offset + rx_size) < S_RX_SIZE) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַδ<D6B7><CEB4><EFBFBD><EFBFBD>W5500<30><30><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
{
|
||||
for (i = 0; i < rx_size; i++) // ѭ<><D1AD><EFBFBD><EFBFBD>ȡrx_size<7A><65><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
SPI1_Send_Byte(0x00); // <20><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
j = hspi1.Instance->DR;
|
||||
// j=SPI_I2S_ReceiveData(SPI1);//<2F><>ȡ1<C8A1><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*dat_ptr = j; // <20><><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1>浽<EFBFBD><E6B5BD><EFBFBD>ݱ<EFBFBD><DDB1>滺<EFBFBD><E6BBBA><EFBFBD><EFBFBD>
|
||||
dat_ptr++; // <20><><EFBFBD>ݱ<EFBFBD><DDB1>滺<EFBFBD><E6BBBA><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>1
|
||||
}
|
||||
}
|
||||
else // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>W5500<30><30><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
{
|
||||
offset = S_RX_SIZE - offset;
|
||||
for (i = 0; i < offset; i++) // ѭ<><D1AD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>ǰoffset<65><74><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
SPI1_Send_Byte(0x00); // <20><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
j = hspi1.Instance->DR;
|
||||
// j=SPI_I2S_ReceiveData(SPI1);//<2F><>ȡ1<C8A1><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*dat_ptr = j; // <20><><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1>浽<EFBFBD><E6B5BD><EFBFBD>ݱ<EFBFBD><DDB1>滺<EFBFBD><E6BBBA><EFBFBD><EFBFBD>
|
||||
dat_ptr++; // <20><><EFBFBD>ݱ<EFBFBD><DDB1>滺<EFBFBD><E6BBBA><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>1
|
||||
}
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(0x00); // д16λ<36><CEBB>ַ
|
||||
SPI1_Send_Byte(VDM | RWB_READ | (s * 0x20 + 0x18)); // д<><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,N<><4E><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,ѡ<><D1A1><EFBFBD>˿<EFBFBD>s<EFBFBD>ļĴ<C4BC><C4B4><EFBFBD>
|
||||
j = hspi1.Instance->DR;
|
||||
// j=SPI_I2S_ReceiveData(SPI1);
|
||||
|
||||
for (; i < rx_size; i++) // ѭ<><D1AD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>rx_size-offset<65><74><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
SPI1_Send_Byte(0x00); // <20><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
j = hspi1.Instance->DR;
|
||||
// j=SPI_I2S_ReceiveData(SPI1);//<2F><>ȡ1<C8A1><31><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*dat_ptr = j; // <20><><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1>浽<EFBFBD><E6B5BD><EFBFBD>ݱ<EFBFBD><DDB1>滺<EFBFBD><E6BBBA><EFBFBD><EFBFBD>
|
||||
dat_ptr++; // <20><><EFBFBD>ݱ<EFBFBD><DDB1>滺<EFBFBD><E6BBBA><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>1
|
||||
}
|
||||
}
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
offset1 += rx_size; // <20><><EFBFBD><EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ,<2C><><EFBFBD>´ζ<C2B4>ȡ<EFBFBD><C8A1><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD><DDB5><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
||||
Write_W5500_SOCK_2Byte(s, Sn_RX_RD, offset1);
|
||||
Write_W5500_SOCK_1Byte(s, Sn_CR, RECV); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
return rx_size; // <20><><EFBFBD>ؽ<EFBFBD><D8BD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD>ݵij<DDB5><C4B3><EFBFBD>
|
||||
}
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Write_SOCK_Data_Buffer
|
||||
* <20><><EFBFBD><EFBFBD> : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4>W5500<30><30><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : s:<3A>˿ں<CBBF>,*dat_ptr:<3A><><EFBFBD>ݱ<EFBFBD><DDB1>滺<EFBFBD><E6BBBA><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>,size:<3A><>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD>ݵij<DDB5><C4B3><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
static void Write_SOCK_Data_Buffer(bsp_W5500_Class_t *pW5500_Class, u8 *dat_ptr, u16 size)
|
||||
{
|
||||
u16 offset, offset1;
|
||||
u16 i;
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>UDPģʽ,<2C><><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD><DAB4><EFBFBD><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP<49>Ͷ˿ں<CBBF>
|
||||
if ((Read_W5500_SOCK_1Byte(pW5500_Class->SocketPort, Sn_MR) & 0x0f) != SOCK_UDP) // <20><><EFBFBD><EFBFBD>Socket<65><74><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||
{
|
||||
Write_W5500_SOCK_4Byte(pW5500_Class->SocketPort, Sn_DIPR, pW5500_Class->ConfigData.UDP_DIPR); // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP
|
||||
Write_W5500_SOCK_2Byte(pW5500_Class->SocketPort, Sn_DPORTR, pW5500_Class->ConfigData.UDP_DPORT[0]<<8 | pW5500_Class->ConfigData.UDP_DPORT[1]); // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿ں<CBBF>
|
||||
}
|
||||
|
||||
offset = Read_W5500_SOCK_2Byte(pW5500_Class->SocketPort, Sn_TX_WR);
|
||||
offset1 = offset;
|
||||
offset &= (S_TX_SIZE - 1); // <20><><EFBFBD><EFBFBD>ʵ<EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(offset); // д16λ<36><CEBB>ַ
|
||||
SPI1_Send_Byte(VDM | RWB_WRITE | (pW5500_Class->SocketPort * 0x20 + 0x10)); // д<><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,N<><4E><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,д<><D0B4><EFBFBD><EFBFBD>,ѡ<><D1A1><EFBFBD>˿<EFBFBD>s<EFBFBD>ļĴ<C4BC><C4B4><EFBFBD>
|
||||
|
||||
if ((offset + size) < S_TX_SIZE) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַδ<D6B7><CEB4><EFBFBD><EFBFBD>W5500<30><30><EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
{
|
||||
for (i = 0; i < size; i++) // ѭ<><D1AD>д<EFBFBD><D0B4>size<7A><65><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
SPI1_Send_Byte(*dat_ptr++); // д<><D0B4>һ<EFBFBD><D2BB><EFBFBD>ֽڵ<D6BD><DAB5><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
}
|
||||
else // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>W5500<30><30><EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
{
|
||||
offset = S_TX_SIZE - offset;
|
||||
for (i = 0; i < offset; i++) // ѭ<><D1AD>д<EFBFBD><D0B4>ǰoffset<65><74><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
SPI1_Send_Byte(*dat_ptr++); // д<><D0B4>һ<EFBFBD><D2BB><EFBFBD>ֽڵ<D6BD><DAB5><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_RESET); // <20><>W5500<30><30>SCSΪ<53>͵<EFBFBD>ƽ
|
||||
|
||||
SPI1_Send_Short(0x00); // д16λ<36><CEBB>ַ
|
||||
SPI1_Send_Byte(VDM | RWB_WRITE | (pW5500_Class->SocketPort * 0x20 + 0x10)); // д<><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>,N<><4E><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>,д<><D0B4><EFBFBD><EFBFBD>,ѡ<><D1A1><EFBFBD>˿<EFBFBD>s<EFBFBD>ļĴ<C4BC><C4B4><EFBFBD>
|
||||
|
||||
for (; i < size; i++) // ѭ<><D1AD>д<EFBFBD><D0B4>size-offset<65><74><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
SPI1_Send_Byte(*dat_ptr++); // д<><D0B4>һ<EFBFBD><D2BB><EFBFBD>ֽڵ<D6BD><DAB5><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
}
|
||||
HAL_GPIO_WritePin(W5500_SCS_PORT, W5500_SCS, GPIO_PIN_SET); // <20><>W5500<30><30>SCSΪ<53>ߵ<EFBFBD>ƽ
|
||||
|
||||
offset1 += size; // <20><><EFBFBD><EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ,<2C><><EFBFBD>´<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD><DDB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
||||
Write_W5500_SOCK_2Byte(pW5500_Class->SocketPort, Sn_TX_WR, offset1);
|
||||
Write_W5500_SOCK_1Byte(pW5500_Class->SocketPort, Sn_CR, SEND); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : W5500_Hardware_Reset
|
||||
* <20><><EFBFBD><EFBFBD> : Ӳ<><D3B2><EFBFBD><EFBFBD>λW5500
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : W5500<30>ĸ<EFBFBD>λ<EFBFBD><CEBB><EFBFBD>ű<EFBFBD><C5B1>ֵ͵<D6B5>ƽ<EFBFBD><C6BD><EFBFBD><EFBFBD>500us<75><73><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ΧW5500
|
||||
*******************************************************************************/
|
||||
void W5500_Hardware_Reset(void)
|
||||
{
|
||||
HAL_GPIO_WritePin(W5500_RST_PORT, W5500_RST, GPIO_PIN_RESET); // <20><>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
HAL_Delay(50);
|
||||
HAL_GPIO_WritePin(W5500_RST_PORT, W5500_RST, GPIO_PIN_SET); // <20><>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
HAL_Delay(100);
|
||||
|
||||
// while((Read_W5500_1Byte(PHYCFGR)&LINK)==0);//<2F>ȴ<EFBFBD><C8B4><EFBFBD>̫<EFBFBD><CCAB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : W5500_Init
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>ʼ<EFBFBD><CABC>W5500<30>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : <20><>ʹ<EFBFBD><CAB9>W5500֮ǰ<D6AE><C7B0><EFBFBD>ȶ<EFBFBD>W5500<30><30>ʼ<EFBFBD><CABC>
|
||||
*******************************************************************************/
|
||||
void W5500_Init(void)
|
||||
{
|
||||
u16 i = 0;
|
||||
|
||||
Write_W5500_1Byte(MR, RST); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λW5500,<2C><>1<EFBFBD><31>Ч,<2C><>λ<EFBFBD><CEBB><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD>0
|
||||
|
||||
HAL_Delay(10); // <20><>ʱ10ms,<2C>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ú<EFBFBD><C3BA><EFBFBD>
|
||||
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(Gateway)<29><>IP<49><50>ַ,Gateway_IPΪ4<CEAA>ֽ<EFBFBD>u8<75><38><EFBFBD><EFBFBD>,<2C>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD>
|
||||
// ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD>ؿ<EFBFBD><D8BF><EFBFBD>ʹͨ<CAB9><CDA8>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ľ<EFBFBD><C4BE>ޣ<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD><EFBFBD>ؿ<EFBFBD><D8BF>Է<EFBFBD><D4B7>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Internet
|
||||
Write_W5500_nByte(GAR, pW5500->Gateway_IP, 4);
|
||||
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(MASK)ֵ,SUB_MASKΪ4<CEAA>ֽ<EFBFBD>u8<75><38><EFBFBD><EFBFBD>,<2C>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
Write_W5500_nByte(SUBR, pW5500->Sub_Mask, 4);
|
||||
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ,PHY_ADDRΪ6<CEAA>ֽ<EFBFBD>u8<75><38><EFBFBD><EFBFBD>,<2C>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD>Ψһ<CEA8><D2BB>ʶ<EFBFBD><CAB6><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵַ
|
||||
// <20>õ<EFBFBD>ֵַ<D6B7><D6B5>Ҫ<EFBFBD><D2AA>IEEE<45><45><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD>OUI<55>Ĺ涨<C4B9><E6B6A8>ǰ3<C7B0><33><EFBFBD>ֽ<EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>̴<EFBFBD><CCB4>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>Ϊ<EFBFBD><CEAA>Ʒ<EFBFBD><C6B7><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ע<EFBFBD><D7A2><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>ֽڱ<D6BD><DAB1><EFBFBD>Ϊż<CEAA><C5BC>
|
||||
Write_W5500_nByte(SHAR, pW5500->Phy_Addr, 6);
|
||||
|
||||
// <20><><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD><EFBFBD><EFBFBD>IP<49><50>ַ,IP_ADDRΪ4<CEAA>ֽ<EFBFBD>u8<75><38><EFBFBD><EFBFBD>,<2C>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD>
|
||||
// ע<>⣬<EFBFBD><E2A3AC><EFBFBD><EFBFBD>IP<49><50><EFBFBD><EFBFBD><EFBFBD>뱾<EFBFBD><EBB1BE>IP<49><50><EFBFBD><EFBFBD>ͬһ<CDAC><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><F2B1BEBB><EFBFBD><EFBFBD><EFBFBD><DEB7>ҵ<EFBFBD><D2B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
Write_W5500_nByte(SIPR, pW5500->IP_Addr, 4);
|
||||
|
||||
// <20><><EFBFBD>÷<EFBFBD><C3B7>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͽ<EFBFBD><CDBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD>С<EFBFBD><D0A1><EFBFBD>ο<EFBFBD>W5500<30><30><EFBFBD><EFBFBD><EFBFBD>ֲ<EFBFBD>
|
||||
for (i = 0; i < 8; i++)
|
||||
{
|
||||
Write_W5500_SOCK_1Byte(i, Sn_RXBUF_SIZE, 0x02); // Socket Rx memory size=2k
|
||||
Write_W5500_SOCK_1Byte(i, Sn_TXBUF_SIZE, 0x02); // Socket Tx mempry size=2k
|
||||
}
|
||||
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>䣬Ĭ<E4A3AC><C4AC>Ϊ2000(200ms)
|
||||
// ÿһ<C3BF><D2BB>λ<EFBFBD><CEBB>ֵΪ100<30><CEA2>,<2C><>ʼ<EFBFBD><CABC>ʱֵ<CAB1><D6B5>Ϊ2000(0x07D0),<2C><><EFBFBD><EFBFBD>200<30><30><EFBFBD><EFBFBD>
|
||||
Write_W5500_2Byte(RTR, 0x07d0);
|
||||
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD><C4AC>Ϊ8<CEAA><38>
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>趨ֵ,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>ж<EFBFBD>(<28><><EFBFBD>صĶ˿<C4B6><CBBF>жϼĴ<CFBC><C4B4><EFBFBD><EFBFBD>е<EFBFBD>Sn_IR <20><>ʱλ(TIMEOUT)<29>á<EFBFBD>1<EFBFBD><31>)
|
||||
Write_W5500_1Byte(RCR, 8);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Detect_Gateway
|
||||
* <20><><EFBFBD><EFBFBD> : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD>TRUE(0xFF),ʧ<>ܷ<EFBFBD><DCB7><EFBFBD>FALSE(0x00)
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
u8 Detect_Gateway(void)
|
||||
{
|
||||
u8 ip_adde[4];
|
||||
ip_adde[0] = pW5500->IP_Addr[0] + 1;
|
||||
ip_adde[1] = pW5500->IP_Addr[1] + 1;
|
||||
ip_adde[2] = pW5500->IP_Addr[2] + 1;
|
||||
ip_adde[3] = pW5500->IP_Addr[3] + 1;
|
||||
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
Write_W5500_SOCK_4Byte(0, Sn_DIPR, ip_adde); // <20><>Ŀ<EFBFBD>ĵ<EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>д<EFBFBD><D0B4><EFBFBD>뱾<EFBFBD><EBB1BE>IP<49><50>ͬ<EFBFBD><CDAC>IPֵ
|
||||
Write_W5500_SOCK_1Byte(0, Sn_MR, MR_TCP); // <20><><EFBFBD><EFBFBD>socketΪTCPģʽ
|
||||
Write_W5500_SOCK_1Byte(0, Sn_CR, OPEN); // <20><><EFBFBD><EFBFBD>Socket
|
||||
HAL_Delay(5); // <20><>ʱ5ms
|
||||
|
||||
if (Read_W5500_SOCK_1Byte(0, Sn_SR) != SOCK_INIT) // <20><><EFBFBD><EFBFBD>socket<65><74><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||
{
|
||||
Write_W5500_SOCK_1Byte(0, Sn_CR, CLOSE); // <20><EFBFBD><F2BFAAB2>ɹ<EFBFBD>,<2C>ر<EFBFBD>Socket
|
||||
return FALSE; // <20><><EFBFBD><EFBFBD>FALSE(0x00)
|
||||
}
|
||||
|
||||
Write_W5500_SOCK_1Byte(0, Sn_CR, CONNECT); // <20><><EFBFBD><EFBFBD>SocketΪConnectģʽ
|
||||
|
||||
do
|
||||
{
|
||||
u16 j = 0;
|
||||
j = Read_W5500_SOCK_1Byte(0, Sn_IR); // <20><>ȡSocket0<74>жϱ<D0B6>־<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>
|
||||
if (j != 0)
|
||||
Write_W5500_SOCK_1Byte(0, Sn_IR, j);
|
||||
HAL_Delay(5); // <20><>ʱ5ms
|
||||
if ((j & IR_TIMEOUT) == IR_TIMEOUT)
|
||||
{
|
||||
return FALSE;
|
||||
}
|
||||
else if (Read_W5500_SOCK_1Byte(0, Sn_DHAR) != 0xff)
|
||||
{
|
||||
Write_W5500_SOCK_1Byte(0, Sn_CR, CLOSE); // <20>ر<EFBFBD>Socket
|
||||
return TRUE;
|
||||
}
|
||||
} while (1);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Socket_Init
|
||||
* <20><><EFBFBD><EFBFBD> : ָ<><D6B8>Socket(0~7)<29><>ʼ<EFBFBD><CABC>
|
||||
* <20><><EFBFBD><EFBFBD> : s:<3A><><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD>Ķ˿<C4B6>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
static void bsp_W5500_Socket_Init(bsp_W5500_Class_t *pW5500_Class)
|
||||
{
|
||||
Write_W5500_SOCK_2Byte(pW5500_Class->SocketPort, Sn_MSSR, 1460); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƭ<EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD>=1460(0x5b4)
|
||||
Write_W5500_SOCK_2Byte(pW5500_Class->SocketPort, Sn_PORT, pW5500_Class->ConfigData.Port[0]<<8 | pW5500_Class->ConfigData.Port[1]);
|
||||
// <20><><EFBFBD>ö˿<C3B6>0Ŀ<30><C4BF>(Զ<><D4B6>)<29>˿ں<CBBF>
|
||||
Write_W5500_SOCK_2Byte(pW5500_Class->SocketPort, Sn_DPORTR, pW5500_Class->ConfigData.DPort[0]<<8 | pW5500_Class->ConfigData.DPort[1]);
|
||||
// <20><><EFBFBD>ö˿<C3B6>0Ŀ<30><C4BF>(Զ<><D4B6>)IP<49><50>ַ
|
||||
Write_W5500_SOCK_4Byte(pW5500_Class->SocketPort, Sn_DIPR, pW5500_Class->ConfigData.DIP);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Socket_Connect
|
||||
* <20><><EFBFBD><EFBFBD> : <20><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>Socket(0~7)Ϊ<>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD>̷<EFBFBD><CCB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : s:<3A><><EFBFBD>趨<EFBFBD>Ķ˿<C4B6>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD>TRUE(0xFF),ʧ<>ܷ<EFBFBD><DCB7><EFBFBD>FALSE(0x00)
|
||||
* ˵<><CBB5> : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Socket<65><74><EFBFBD><EFBFBD><EFBFBD>ڿͻ<DABF><CDBB><EFBFBD>ģʽʱ,<2C><><EFBFBD>øó<C3B8><C3B3><EFBFBD>,<2C><>Զ<EFBFBD>̷<EFBFBD><CCB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӻ<EFBFBD><D3BA><EFBFBD><EFBFBD>ֳ<EFBFBD>ʱ<EFBFBD>жϣ<D0B6><CFA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>,<2C><>Ҫ<EFBFBD><D2AA><EFBFBD>µ<EFBFBD><C2B5>øó<C3B8><C3B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20>ó<EFBFBD><C3B3><EFBFBD>ÿ<EFBFBD><C3BF><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*******************************************************************************/
|
||||
u8 Socket_Connect(SOCKET s)
|
||||
{
|
||||
Write_W5500_SOCK_1Byte(s, Sn_MR, MR_TCP); // <20><><EFBFBD><EFBFBD>socketΪTCPģʽ
|
||||
Write_W5500_SOCK_1Byte(s, Sn_CR, OPEN); // <20><><EFBFBD><EFBFBD>Socket
|
||||
HAL_Delay(5); // <20><>ʱ5ms
|
||||
if (Read_W5500_SOCK_1Byte(s, Sn_SR) != SOCK_INIT) // <20><><EFBFBD><EFBFBD>socket<65><74><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||
{
|
||||
Write_W5500_SOCK_1Byte(s, Sn_CR, CLOSE); // <20><EFBFBD><F2BFAAB2>ɹ<EFBFBD>,<2C>ر<EFBFBD>Socket
|
||||
return FALSE; // <20><><EFBFBD><EFBFBD>FALSE(0x00)
|
||||
}
|
||||
Write_W5500_SOCK_1Byte(s, Sn_CR, CONNECT); // <20><><EFBFBD><EFBFBD>SocketΪConnectģʽ
|
||||
return TRUE; // <20><><EFBFBD><EFBFBD>TRUE,<2C><><EFBFBD>óɹ<C3B3>
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Socket_Listen
|
||||
* <20><><EFBFBD><EFBFBD> : <20><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>Socket(0~7)<29><>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȴ<EFBFBD>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : s:<3A><><EFBFBD>趨<EFBFBD>Ķ˿<C4B6>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD>TRUE(0xFF),ʧ<>ܷ<EFBFBD><DCB7><EFBFBD>FALSE(0x00)
|
||||
* ˵<><CBB5> : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Socket<65><74><EFBFBD><EFBFBD><EFBFBD>ڷ<EFBFBD><DAB7><EFBFBD><EFBFBD><EFBFBD>ģʽʱ,<2C><><EFBFBD>øó<C3B8><C3B3><EFBFBD>,<2C>ȵ<EFBFBD>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20>ó<EFBFBD><C3B3><EFBFBD>ֻ<EFBFBD><D6BB><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>,<2C><>ʹW5500<30><30><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
|
||||
*******************************************************************************/
|
||||
u8 Socket_Listen(SOCKET s)
|
||||
{
|
||||
Write_W5500_SOCK_1Byte(s, Sn_MR, MR_TCP); // <20><><EFBFBD><EFBFBD>socketΪTCPģʽ
|
||||
Write_W5500_SOCK_1Byte(s, Sn_CR, OPEN); // <20><><EFBFBD><EFBFBD>Socket
|
||||
HAL_Delay(5); // <20><>ʱ5ms
|
||||
if (Read_W5500_SOCK_1Byte(s, Sn_SR) != SOCK_INIT) // <20><><EFBFBD><EFBFBD>socket<65><74><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||
{
|
||||
Write_W5500_SOCK_1Byte(s, Sn_CR, CLOSE); // <20><EFBFBD><F2BFAAB2>ɹ<EFBFBD>,<2C>ر<EFBFBD>Socket
|
||||
return FALSE; // <20><><EFBFBD><EFBFBD>FALSE(0x00)
|
||||
}
|
||||
Write_W5500_SOCK_1Byte(s, Sn_CR, LISTEN); // <20><><EFBFBD><EFBFBD>SocketΪ<74><CEAA><EFBFBD><EFBFBD>ģʽ
|
||||
HAL_Delay(5); // <20><>ʱ5ms
|
||||
if (Read_W5500_SOCK_1Byte(s, Sn_SR) != SOCK_LISTEN) // <20><><EFBFBD><EFBFBD>socket<65><74><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||
{
|
||||
Write_W5500_SOCK_1Byte(s, Sn_CR, CLOSE); // <20><><EFBFBD>ò<EFBFBD><C3B2>ɹ<EFBFBD>,<2C>ر<EFBFBD>Socket
|
||||
return FALSE; // <20><><EFBFBD><EFBFBD>FALSE(0x00)
|
||||
}
|
||||
|
||||
return TRUE;
|
||||
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Socket<65>Ĵ<C4B4><F2BFAABA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD>Զ<EFBFBD>̿ͻ<CCBF><CDBB><EFBFBD><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD>Ҫ<EFBFBD>ȴ<EFBFBD>Socket<65>жϣ<D0B6>
|
||||
// <20><><EFBFBD>ж<EFBFBD>Socket<65><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD><C7B7>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD>ο<EFBFBD>W5500<30><30><EFBFBD><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD>Socket<65>ж<EFBFBD>״̬
|
||||
// <20>ڷ<EFBFBD><DAB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF>IP<49><50>Ŀ<EFBFBD>Ķ˿ں<CBBF>
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : Socket_UDP
|
||||
* <20><><EFBFBD><EFBFBD> : <20><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>Socket(0~7)ΪUDPģʽ
|
||||
* <20><><EFBFBD><EFBFBD> : s:<3A><><EFBFBD>趨<EFBFBD>Ķ˿<C4B6>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD>TRUE(0xFF),ʧ<>ܷ<EFBFBD><DCB7><EFBFBD>FALSE(0x00)
|
||||
* ˵<><CBB5> : <20><><EFBFBD><EFBFBD>Socket<65><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD>UDPģʽ,<2C><><EFBFBD>øó<C3B8><C3B3><EFBFBD>,<2C><>UDPģʽ<C4A3><CABD>,Socketͨ<74>Ų<EFBFBD><C5B2><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20>ó<EFBFBD><C3B3><EFBFBD>ֻ<EFBFBD><D6BB><EFBFBD><EFBFBD>һ<EFBFBD>Σ<EFBFBD><CEA3><EFBFBD>ʹW5500<30><30><EFBFBD><EFBFBD>ΪUDPģʽ
|
||||
*******************************************************************************/
|
||||
u8 Socket_UDP(SOCKET s)
|
||||
{
|
||||
Write_W5500_SOCK_1Byte(s, Sn_MR, MR_UDP); // <20><><EFBFBD><EFBFBD>SocketΪUDPģʽ*/
|
||||
Write_W5500_SOCK_1Byte(s, Sn_CR, OPEN); // <20><><EFBFBD><EFBFBD>Socket*/
|
||||
HAL_Delay(5); // <20><>ʱ5ms
|
||||
if (Read_W5500_SOCK_1Byte(s, Sn_SR) != SOCK_UDP) // <20><><EFBFBD><EFBFBD>Socket<65><74><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||
{
|
||||
Write_W5500_SOCK_1Byte(s, Sn_CR, CLOSE); // <20><EFBFBD><F2BFAAB2>ɹ<EFBFBD>,<2C>ر<EFBFBD>Socket
|
||||
return FALSE; // <20><><EFBFBD><EFBFBD>FALSE(0x00)
|
||||
}
|
||||
else
|
||||
return TRUE;
|
||||
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Socket<65>Ĵ<C4B4>UDPģʽ<C4A3><CABD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><>ΪSocket<65><74><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD>ڷ<EFBFBD><DAB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP<49><50>Ŀ<EFBFBD><C4BF>Socket<65>Ķ˿ں<CBBF>
|
||||
// <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP<49><50>Ŀ<EFBFBD><C4BF>Socket<65>Ķ˿ں<CBBF><DABA>ǹ̶<C7B9><CCB6><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD>иı<D0B8>,<2C><>ôҲ<C3B4><D2B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> : W5500_Interrupt_Process
|
||||
* <20><><EFBFBD><EFBFBD> : W5500<30>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD> : <20><>
|
||||
* <20><><EFBFBD><EFBFBD>ֵ : <20><>
|
||||
* ˵<><CBB5> : <20><>
|
||||
*******************************************************************************/
|
||||
static void bsp_W5500_Interrupt_Process(void)
|
||||
{
|
||||
u8 i, j;
|
||||
u8 Int_Flag,Socket_Flag;
|
||||
|
||||
IntDispose:
|
||||
|
||||
Int_Flag = Read_W5500_1Byte(SIR); // <20><>ȡ<EFBFBD>˿<EFBFBD><CBBF>жϱ<D0B6>־<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>
|
||||
HAL_Delay(10);
|
||||
for(i=0;i<BSP_W5500_PORT_NUM;i++)
|
||||
{
|
||||
if(Int_Flag & (0x01 << i))
|
||||
{
|
||||
Socket_Flag = Read_W5500_SOCK_1Byte(pW5500->W5500_Class[i].SocketPort, Sn_IR); // <20><>ȡSocket0<74>жϱ<D0B6>־<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>
|
||||
Write_W5500_SOCK_1Byte(pW5500->W5500_Class[i].SocketPort, Sn_IR, Socket_Flag);
|
||||
if (Socket_Flag & IR_CON) // <20><>TCPģʽ<C4A3><CABD>,Socket0<74>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
pW5500->W5500_Class[i].Run_State |= BSP_W5500_PORT_RUN_STATE_CONN; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬0x02,<2C>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӣ<EFBFBD><D3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
if (Socket_Flag & IR_DISCON) // <20><>TCPģʽ<C4A3><CABD>Socket<65>Ͽ<EFBFBD><CFBF><EFBFBD><EFBFBD>Ӵ<EFBFBD><D3B4><EFBFBD>
|
||||
{
|
||||
Write_W5500_SOCK_1Byte(pW5500->W5500_Class[i].SocketPort, Sn_CR, CLOSE); // <20>رն˿<D5B6>,<2C>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD>´<EFBFBD><C2B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
bsp_W5500_Socket_Init(&pW5500->W5500_Class[i]); // ָ<><D6B8>Socket(0~7)<29><>ʼ<EFBFBD><CABC>,<2C><>ʼ<EFBFBD><CABC><EFBFBD>˿<EFBFBD>0
|
||||
pW5500->W5500_Class[i].Run_State = 0; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬0x00,<2C>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||
}
|
||||
if (Socket_Flag & IR_SEND_OK) // Socket0<74><30><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD>ٴ<EFBFBD><D9B4><EFBFBD><EFBFBD><EFBFBD>S_tx_process()<29><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
pW5500->W5500_Class[i].TR_Data_State |= BSP_W5500_PORT_DATA_TRANSMITOK; // <20>˿ڷ<CBBF><DAB7><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD><DDB0><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
if (Socket_Flag & IR_RECV) // Socket<65><74><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>S_rx_process()<29><><EFBFBD><EFBFBD>
|
||||
{
|
||||
pW5500->W5500_Class[i].TR_Data_State |= BSP_W5500_PORT_DATA_RECEIVE; // <20>˿ڽ<CBBF><DABD>յ<EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>
|
||||
}
|
||||
if (Socket_Flag & IR_TIMEOUT) // Socket<65><74><EFBFBD>ӻ<EFBFBD><D3BB><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4>䳬ʱ<E4B3AC><CAB1><EFBFBD><EFBFBD>
|
||||
{
|
||||
Write_W5500_SOCK_1Byte(pW5500->W5500_Class[i].SocketPort, Sn_CR, CLOSE); // <20>رն˿<D5B6>,<2C>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD>´<EFBFBD><C2B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
pW5500->W5500_Class[i].TR_Data_State = 0; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬0x00,<2C>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
if (Read_W5500_1Byte(SIR) != 0)
|
||||
goto IntDispose;
|
||||
}
|
||||
|
||||
|
||||
void bsp_W5500_Socket_Set(bsp_W5500_Class_t *pW5500_Class)
|
||||
{
|
||||
if (0 == pW5500_Class->Run_State)
|
||||
{
|
||||
switch(pW5500_Class->Run_Mode)
|
||||
{
|
||||
/*TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ*/
|
||||
case BSP_W5500_PORT_RUN_MODE_TCP_SERVER:
|
||||
{
|
||||
if (Socket_Listen(pW5500_Class->SocketPort) == TRUE)
|
||||
pW5500_Class->Run_State = BSP_W5500_PORT_RUN_STATE_INIT;
|
||||
else
|
||||
pW5500_Class->Run_State = 0;
|
||||
}break;
|
||||
/*TCP<43>ͻ<EFBFBD><CDBB><EFBFBD>ģʽ*/
|
||||
case BSP_W5500_PORT_RUN_MODE_TCP_CLIENT:
|
||||
{
|
||||
if(Socket_Connect(pW5500_Class->SocketPort)==TRUE)
|
||||
pW5500_Class->Run_State = BSP_W5500_PORT_RUN_STATE_INIT;
|
||||
else
|
||||
pW5500_Class->Run_State = 0;
|
||||
}break;
|
||||
/*UDPģʽ*/
|
||||
case BSP_W5500_PORT_RUN_MODE_UDP:
|
||||
{
|
||||
if(Socket_UDP(pW5500_Class->SocketPort)==TRUE)
|
||||
pW5500_Class->Run_State = BSP_W5500_PORT_RUN_STATE_INIT | BSP_W5500_PORT_RUN_STATE_CONN;
|
||||
else
|
||||
pW5500_Class->Run_State = 0;
|
||||
}break;
|
||||
default:break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void bsp_W5500_Init()
|
||||
{
|
||||
u8 i;
|
||||
W5500_Hardware_Reset(); /*Ӳ<><D3B2><EFBFBD><EFBFBD>λW5500*/
|
||||
W5500_Init(); /*<2A><>ʼ<EFBFBD><CABC>W5500<30>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
Detect_Gateway(); /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
|
||||
for(i=0;i<BSP_W5500_PORT_NUM;i++)
|
||||
{
|
||||
bsp_W5500_Socket_Init(&pW5500->W5500_Class[i]);
|
||||
pW5500->W5500_Class[i].Run_State = 0; /*<2A><>λ״̬*/
|
||||
//bsp_W5500_Socket_Set(&pW5500->W5500_Class[i]); /*W5500<30>˿ڳ<CBBF>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
}
|
||||
}
|
||||
|
||||
static void bsp_W5500_Task(void)
|
||||
{
|
||||
u8 i;
|
||||
for(i=0;i<BSP_W5500_PORT_NUM;i++)
|
||||
{
|
||||
bsp_W5500_Socket_Set(&pW5500->W5500_Class[i]); /*W5500<30>˿ڳ<CBBF>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
}
|
||||
bsp_W5500_Interrupt_Process(); // W5500<30>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
for(i=0;i<BSP_W5500_PORT_NUM;i++)
|
||||
{
|
||||
if ((pW5500->W5500_Class[i].TR_Data_State & BSP_W5500_PORT_DATA_RECEIVE) == BSP_W5500_PORT_DATA_RECEIVE) // <20><><EFBFBD><EFBFBD>Socket0<74><30><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
pW5500->W5500_Class[i].TR_Data_State &= ~BSP_W5500_PORT_DATA_RECEIVE;
|
||||
u16 Len = Read_SOCK_Data_Buffer(0, pW5500->W5500_Class[i].Rx_Buffer);
|
||||
// Write_SOCK_Data_Buffer(&pW5500->W5500_Class[i], pW5500->W5500_Class[i].Rx_Buffer, Len);
|
||||
// printf("RX");
|
||||
// Debug_UartSend(pW5500->W5500_Class[i].Rx_Buffer, Len);
|
||||
if(pW5500->W5500_Class[i].Rx_DataAnalysis != NULL)
|
||||
{
|
||||
pW5500->W5500_Class[i].Rx_DataAnalysis(&pW5500->W5500_Class[i],pW5500->W5500_Class[i].Rx_Buffer,Len);/*<2A><><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD>*/
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
322
calib_board/usr/bsp/bsp_W5500.h
Normal file
322
calib_board/usr/bsp/bsp_W5500.h
Normal file
@@ -0,0 +1,322 @@
|
||||
#ifndef _W5500_H_
|
||||
#define _W5500_H_
|
||||
|
||||
#include "main.h"
|
||||
|
||||
/***************** Common Register *****************/
|
||||
#define MR 0x0000
|
||||
#define RST 0x80
|
||||
#define WOL 0x20
|
||||
#define PB 0x10
|
||||
#define PPP 0x08
|
||||
#define FARP 0x02
|
||||
|
||||
#define GAR 0x0001
|
||||
#define SUBR 0x0005
|
||||
#define SHAR 0x0009
|
||||
#define SIPR 0x000f
|
||||
|
||||
#define INTLEVEL 0x0013
|
||||
#define IR 0x0015
|
||||
#define CONFLICT 0x80
|
||||
#define UNREACH 0x40
|
||||
#define PPPOE 0x20
|
||||
#define MP 0x10
|
||||
|
||||
#define IMR 0x0016
|
||||
#define IM_IR7 0x80
|
||||
#define IM_IR6 0x40
|
||||
#define IM_IR5 0x20
|
||||
#define IM_IR4 0x10
|
||||
|
||||
#define SIR 0x0017
|
||||
#define S7_INT 0x80
|
||||
#define S6_INT 0x40
|
||||
#define S5_INT 0x20
|
||||
#define S4_INT 0x10
|
||||
#define S3_INT 0x08
|
||||
#define S2_INT 0x04
|
||||
#define S1_INT 0x02
|
||||
#define S0_INT 0x01
|
||||
|
||||
#define SIMR 0x0018
|
||||
#define S7_IMR 0x80
|
||||
#define S6_IMR 0x40
|
||||
#define S5_IMR 0x20
|
||||
#define S4_IMR 0x10
|
||||
#define S3_IMR 0x08
|
||||
#define S2_IMR 0x04
|
||||
#define S1_IMR 0x02
|
||||
#define S0_IMR 0x01
|
||||
|
||||
#define RTR 0x0019
|
||||
#define RCR 0x001b
|
||||
|
||||
#define PTIMER 0x001c
|
||||
#define PMAGIC 0x001d
|
||||
#define PHA 0x001e
|
||||
#define PSID 0x0024
|
||||
#define PMRU 0x0026
|
||||
|
||||
#define UIPR 0x0028
|
||||
#define UPORT 0x002c
|
||||
|
||||
#define PHYCFGR 0x002e
|
||||
#define RST_PHY 0x80
|
||||
#define OPMODE 0x40
|
||||
#define DPX 0x04
|
||||
#define SPD 0x02
|
||||
#define LINK 0x01
|
||||
|
||||
#define VERR 0x0039
|
||||
|
||||
/********************* Socket Register *******************/
|
||||
#define Sn_MR 0x0000
|
||||
#define MULTI_MFEN 0x80
|
||||
#define BCASTB 0x40
|
||||
#define ND_MC_MMB 0x20
|
||||
#define UCASTB_MIP6B 0x10
|
||||
#define MR_CLOSE 0x00
|
||||
#define MR_TCP 0x01
|
||||
#define MR_UDP 0x02
|
||||
#define MR_MACRAW 0x04
|
||||
|
||||
#define Sn_CR 0x0001
|
||||
#define OPEN 0x01
|
||||
#define LISTEN 0x02
|
||||
#define CONNECT 0x04
|
||||
#define DISCON 0x08
|
||||
#define CLOSE 0x10
|
||||
#define SEND 0x20
|
||||
#define SEND_MAC 0x21
|
||||
#define SEND_KEEP 0x22
|
||||
#define RECV 0x40
|
||||
|
||||
#define Sn_IR 0x0002
|
||||
#define IR_SEND_OK 0x10
|
||||
#define IR_TIMEOUT 0x08
|
||||
#define IR_RECV 0x04
|
||||
#define IR_DISCON 0x02
|
||||
#define IR_CON 0x01
|
||||
|
||||
#define Sn_SR 0x0003
|
||||
#define SOCK_CLOSED 0x00
|
||||
#define SOCK_INIT 0x13
|
||||
#define SOCK_LISTEN 0x14
|
||||
#define SOCK_ESTABLISHED 0x17
|
||||
#define SOCK_CLOSE_WAIT 0x1c
|
||||
#define SOCK_UDP 0x22
|
||||
#define SOCK_MACRAW 0x02
|
||||
|
||||
#define SOCK_SYNSEND 0x15
|
||||
#define SOCK_SYNRECV 0x16
|
||||
#define SOCK_FIN_WAI 0x18
|
||||
#define SOCK_CLOSING 0x1a
|
||||
#define SOCK_TIME_WAIT 0x1b
|
||||
#define SOCK_LAST_ACK 0x1d
|
||||
|
||||
#define Sn_PORT 0x0004
|
||||
#define Sn_DHAR 0x0006
|
||||
#define Sn_DIPR 0x000c
|
||||
#define Sn_DPORTR 0x0010
|
||||
|
||||
#define Sn_MSSR 0x0012
|
||||
#define Sn_TOS 0x0015
|
||||
#define Sn_TTL 0x0016
|
||||
|
||||
#define Sn_RXBUF_SIZE 0x001e
|
||||
#define Sn_TXBUF_SIZE 0x001f
|
||||
#define Sn_TX_FSR 0x0020
|
||||
#define Sn_TX_RD 0x0022
|
||||
#define Sn_TX_WR 0x0024
|
||||
#define Sn_RX_RSR 0x0026
|
||||
#define Sn_RX_RD 0x0028
|
||||
#define Sn_RX_WR 0x002a
|
||||
|
||||
#define Sn_IMR 0x002c
|
||||
#define IMR_SENDOK 0x10
|
||||
#define IMR_TIMEOUT 0x08
|
||||
#define IMR_RECV 0x04
|
||||
#define IMR_DISCON 0x02
|
||||
#define IMR_CON 0x01
|
||||
|
||||
#define Sn_FRAG 0x002d
|
||||
#define Sn_KPALVTR 0x002f
|
||||
|
||||
/*******************************************************************/
|
||||
/************************ SPI Control Byte *************************/
|
||||
/*******************************************************************/
|
||||
/* Operation mode bits */
|
||||
#define VDM 0x00
|
||||
#define FDM1 0x01
|
||||
#define FDM2 0x02
|
||||
#define FDM4 0x03
|
||||
|
||||
/* Read_Write control bit */
|
||||
#define RWB_READ 0x00
|
||||
#define RWB_WRITE 0x04
|
||||
|
||||
/* Block select bits */
|
||||
#define COMMON_R 0x00
|
||||
|
||||
/* Socket 0 */
|
||||
#define S0_REG 0x08
|
||||
#define S0_TX_BUF 0x10
|
||||
#define S0_RX_BUF 0x18
|
||||
|
||||
/* Socket 1 */
|
||||
#define S1_REG 0x28
|
||||
#define S1_TX_BUF 0x30
|
||||
#define S1_RX_BUF 0x38
|
||||
|
||||
/* Socket 2 */
|
||||
#define S2_REG 0x48
|
||||
#define S2_TX_BUF 0x50
|
||||
#define S2_RX_BUF 0x58
|
||||
|
||||
/* Socket 3 */
|
||||
#define S3_REG 0x68
|
||||
#define S3_TX_BUF 0x70
|
||||
#define S3_RX_BUF 0x78
|
||||
|
||||
/* Socket 4 */
|
||||
#define S4_REG 0x88
|
||||
#define S4_TX_BUF 0x90
|
||||
|
||||
/* Socket 5 */
|
||||
#define S5_REG 0xa8
|
||||
#define S5_TX_BUF 0xb0
|
||||
#define S5_RX_BUF 0xb8
|
||||
|
||||
/* Socket 6 */
|
||||
#define S6_REG 0xc8
|
||||
#define S6_TX_BUF 0xd0
|
||||
#define S6_RX_BUF 0xd8
|
||||
|
||||
/* Socket 7 */
|
||||
#define S7_REG 0xe8
|
||||
#define S7_TX_BUF 0xf0
|
||||
#define S7_RX_BUF 0xf8
|
||||
|
||||
#define TRUE 0xff
|
||||
#define FALSE 0x00
|
||||
|
||||
#define S_RX_SIZE 2048 /*<2A><><EFBFBD><EFBFBD>Socket<65><74><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD>Ը<EFBFBD><D4B8><EFBFBD>W5500_RMSR<53><52><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
#define S_TX_SIZE 2048 /*<2A><><EFBFBD><EFBFBD>Socket<65><74><EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD>Ը<EFBFBD><D4B8><EFBFBD>W5500_TMSR<53><52><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
|
||||
/***************----- W5500 GPIO<49><4F><EFBFBD><EFBFBD> -----***************/
|
||||
#define W5500_SCS GPIO_PIN_0 // <20><><EFBFBD><EFBFBD>W5500<30><30>CS<43><53><EFBFBD><EFBFBD>
|
||||
#define W5500_SCS_PORT GPIOB
|
||||
|
||||
#define W5500_RST GPIO_PIN_4 // <20><><EFBFBD><EFBFBD>W5500<30><30>RST<53><54><EFBFBD><EFBFBD>
|
||||
#define W5500_RST_PORT GPIOA
|
||||
|
||||
#define W5500_INT GPIO_PIN_1 // <20><><EFBFBD><EFBFBD>W5500<30><30>INT<4E><54><EFBFBD><EFBFBD>
|
||||
#define W5500_INT_PORT GPIOA
|
||||
|
||||
///***************----- <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> -----***************/
|
||||
//extern u8 Gateway_IP[4]; // <20><><EFBFBD><EFBFBD>IP<49><50>ַ
|
||||
//extern u8 Sub_Mask[4]; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
//extern u8 Phy_Addr[6]; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ(MAC)
|
||||
//extern u8 IP_Addr[4]; // <20><><EFBFBD><EFBFBD>IP<49><50>ַ
|
||||
|
||||
//extern u8 S0_Port[2]; // <20>˿<EFBFBD>0<EFBFBD>Ķ˿ں<CBBF>(5000)
|
||||
//extern u8 S0_DIP[4]; // <20>˿<EFBFBD>0Ŀ<30><C4BF>IP<49><50>ַ
|
||||
//extern u8 S0_DPort[2]; // <20>˿<EFBFBD>0Ŀ<30>Ķ˿ں<CBBF>(6000)
|
||||
|
||||
//extern u8 UDP_DIPR[4]; // UDP(<28>㲥)ģʽ,Ŀ<><C4BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP<49><50>ַ
|
||||
//extern u8 UDP_DPORT[2]; // UDP(<28>㲥)ģʽ,Ŀ<><C4BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿ں<CBBF>
|
||||
|
||||
///***************----- <20>˿ڵ<CBBF><DAB5><EFBFBD><EFBFBD><EFBFBD>ģʽ -----***************/
|
||||
//extern u8 S0_Mode; // <20>˿<EFBFBD>0<EFBFBD><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ,0:TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ,1:TCP<43>ͻ<EFBFBD><CDBB><EFBFBD>ģʽ,2:UDP(<28>㲥)ģʽ
|
||||
//#define TCP_SERVER 0x00 // TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
|
||||
//#define TCP_CLIENT 0x01 // TCP<43>ͻ<EFBFBD><CDBB><EFBFBD>ģʽ
|
||||
//#define UDP_MODE 0x02 // UDP(<28>㲥)ģʽ
|
||||
|
||||
///***************----- <20>˿ڵ<CBBF><DAB5><EFBFBD><EFBFBD><EFBFBD>״̬ -----***************/
|
||||
//extern u8 S0_State; // <20>˿<EFBFBD>0״̬<D7B4><CCAC>¼,1:<3A>˿<EFBFBD><CBBF><EFBFBD><EFBFBD>ɳ<EFBFBD>ʼ<EFBFBD><CABC>,2<>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)
|
||||
//#define S_INIT 0x01 // <20>˿<EFBFBD><CBBF><EFBFBD><EFBFBD>ɳ<EFBFBD>ʼ<EFBFBD><CABC>
|
||||
//#define S_CONN 0x02 // <20>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
///***************----- <20>˿<EFBFBD><CBBF>շ<EFBFBD><D5B7><EFBFBD><EFBFBD>ݵ<EFBFBD>״̬ -----***************/
|
||||
//extern u8 S0_Data; // <20>˿<EFBFBD>0<EFBFBD><30><EFBFBD>պͷ<D5BA><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>״̬,1:<3A>˿ڽ<CBBF><DABD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD>,2:<3A>˿ڷ<CBBF><DAB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
//#define S_RECEIVE 0x01 // <20>˿ڽ<CBBF><DABD>յ<EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>
|
||||
//#define S_TRANSMITOK 0x02 // <20>˿ڷ<CBBF><DAB7><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD><DDB0><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
///***************----- <20>˿<EFBFBD><CBBF><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD><EFBFBD> -----***************/
|
||||
//extern u8 Rx_Buffer[2048]; // <20>˿ڽ<CBBF><DABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD><EFBFBD>
|
||||
//extern u8 Tx_Buffer[2048]; // <20>˿ڷ<CBBF><DAB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
//extern u8 W5500_Interrupt; // W5500<30>жϱ<D0B6>־(0:<3A><><EFBFBD>ж<EFBFBD>,1:<3A><><EFBFBD>ж<EFBFBD>)
|
||||
typedef u8 SOCKET; // <20>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD>˿ں<CBBF><DABA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
// extern void Delay(unsigned int d);//<2F><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>(ms)
|
||||
//extern void W5500_GPIO_Configuration(void); // W5500 GPIO<49><4F>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
//extern void W5500_NVIC_Configuration(void); // W5500 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ȼ<EFBFBD><C8BC><EFBFBD><EFBFBD><EFBFBD>
|
||||
//extern void SPI_Configuration(void); // W5500 SPI<50><49>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(STM32 SPI1)
|
||||
//extern void W5500_Hardware_Reset(void); // Ӳ<><D3B2><EFBFBD><EFBFBD>λW5500
|
||||
//extern void W5500_Init(void); // <20><>ʼ<EFBFBD><CABC>W5500<30>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
//extern u8 Detect_Gateway(void); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
||||
//extern void Socket_Init(SOCKET s); // ָ<><D6B8>Socket(0~7)<29><>ʼ<EFBFBD><CABC>
|
||||
//extern u8 Socket_Connect(SOCKET s); // <20><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>Socket(0~7)Ϊ<>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD>̷<EFBFBD><CCB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
//extern u8 Socket_Listen(SOCKET s); // <20><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>Socket(0~7)<29><>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȴ<EFBFBD>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
//extern u8 Socket_UDP(SOCKET s); // <20><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>Socket(0~7)ΪUDPģʽ
|
||||
//extern u16 Read_SOCK_Data_Buffer(SOCKET s, u8 *dat_ptr); // ָ<><D6B8>Socket(0~7)<29><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>
|
||||
//extern void Write_SOCK_Data_Buffer(SOCKET s, u8 *dat_ptr, u16 size); // ָ<><D6B8>Socket(0~7)<29><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>
|
||||
//extern void W5500_Interrupt_Process(void); // W5500<30>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BSP_W5500_PORT_NUM 1
|
||||
#define BSP_W5500_DATA_LEN 2048
|
||||
|
||||
|
||||
|
||||
typedef struct bsp_W5500_Class_t bsp_W5500_Class_t;
|
||||
|
||||
struct bsp_W5500_Class_t
|
||||
{
|
||||
SOCKET SocketPort;
|
||||
struct
|
||||
{
|
||||
/***************----- <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> -----***************/
|
||||
u8 Gateway_IP[4]; /*<2A><><EFBFBD><EFBFBD>IP<49><50>ַ*/
|
||||
u8 Sub_Mask[4]; /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
u8 Phy_Addr[6]; /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ(MAC)*/
|
||||
u8 IP_Addr[4]; /*<2A><><EFBFBD><EFBFBD>IP<49><50>ַ*/
|
||||
u8 Port[2]; /*<2A>˿<EFBFBD>0<EFBFBD>Ķ˿ں<CBBF>(5000) */
|
||||
u8 DIP[4]; /*<2A>˿<EFBFBD>0Ŀ<30><C4BF>IP<49><50>ַ*/
|
||||
u8 DPort[2]; /*<2A>˿<EFBFBD>0Ŀ<30>Ķ˿ں<CBBF>(6000)*/
|
||||
|
||||
u8 UDP_DIPR[4]; /*UDP(<28>㲥)ģʽ,Ŀ<><C4BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP<49><50>ַ*/
|
||||
u8 UDP_DPORT[2]; /*UDP(<28>㲥)ģʽ,Ŀ<><C4BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿ں<CBBF>*/
|
||||
}ConfigData;
|
||||
/***************----- <20>˿ڵ<CBBF><DAB5><EFBFBD><EFBFBD><EFBFBD>ģʽ -----***************/
|
||||
u8 Run_Mode;
|
||||
/***************----- <20>˿ڵ<CBBF><DAB5><EFBFBD><EFBFBD><EFBFBD>״̬ -----***************/
|
||||
u8 Run_State;
|
||||
/***************----- <20>˿<EFBFBD><CBBF>շ<EFBFBD><D5B7><EFBFBD><EFBFBD>ݵ<EFBFBD>״̬ -----***********/
|
||||
u8 TR_Data_State;
|
||||
/***************----- <20>˿<EFBFBD><CBBF><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD><EFBFBD> -----***************/
|
||||
u8 Rx_Buffer[BSP_W5500_DATA_LEN]; // <20>˿ڽ<CBBF><DABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD><EFBFBD>
|
||||
u8 Tx_Buffer[BSP_W5500_DATA_LEN]; // <20>˿ڷ<CBBF><DAB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
u8 Interrupt; // W5500<30>жϱ<D0B6>־(0:<3A><><EFBFBD>ж<EFBFBD>,1:<3A><><EFBFBD>ж<EFBFBD>)
|
||||
|
||||
void (*Rx_DataAnalysis)(bsp_W5500_Class_t *,u8 *,u16 );
|
||||
};
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
u8 Gateway_IP[4]; /*<2A><><EFBFBD><EFBFBD>IP<49><50>ַ*/
|
||||
u8 Sub_Mask[4]; /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
u8 Phy_Addr[6]; /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ(MAC)*/
|
||||
u8 IP_Addr[4]; /*<2A><><EFBFBD><EFBFBD>IP<49><50>ַ*/
|
||||
bsp_W5500_Class_t W5500_Class[BSP_W5500_PORT_NUM]; /*<2A>˿ڳ<CBBF>Ա*/
|
||||
void (*Interrupt_Process)(void); /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
void (*Init)(void); /*<2A><>ʼ<EFBFBD><CABC>*/
|
||||
void (*Task)(void); /*<2A><><EFBFBD><EFBFBD>*/
|
||||
void (*Socket_Send)(bsp_W5500_Class_t *, u8 *, u16 ); /*<2A>˿ڷ<CBBF><DAB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
}bsp_W5500_t;
|
||||
|
||||
|
||||
extern bsp_W5500_t W5500;
|
||||
#endif
|
||||
241
calib_board/usr/bsp/bsp_w25q.c
Normal file
241
calib_board/usr/bsp/bsp_w25q.c
Normal file
@@ -0,0 +1,241 @@
|
||||
#include "bsp_w25q.h"
|
||||
#include "spi.h"
|
||||
#include "main.h"
|
||||
|
||||
/* spi flash Ƭѡ<C6AC><D1A1><EFBFBD><EFBFBD> - pb12 */
|
||||
#define W25Q32_CS_LOW() HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12, GPIO_PIN_RESET)
|
||||
#define W25Q32_CS_HIGH() HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12, GPIO_PIN_SET)
|
||||
|
||||
/* spi <20><><EFBFBD>亯<EFBFBD><E4BAAF> */
|
||||
static void w25q32_spi_transmit(uint8_t *data, uint16_t size) {
|
||||
HAL_SPI_Transmit(&hspi2, data, size, HAL_MAX_DELAY);
|
||||
}
|
||||
|
||||
static void w25q32_spi_receive(uint8_t *data, uint16_t size) {
|
||||
HAL_SPI_Receive(&hspi2, data, size, HAL_MAX_DELAY);
|
||||
}
|
||||
|
||||
static uint8_t w25q32_spi_transmit_receive(uint8_t data) {
|
||||
uint8_t rx_data;
|
||||
HAL_SPI_TransmitReceive(&hspi2, &data, &rx_data, 1, HAL_MAX_DELAY);
|
||||
return rx_data;
|
||||
}
|
||||
|
||||
/* <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
static void w25q32_init(void);
|
||||
static void w25q32_read(uint32_t addr, uint8_t *data, uint32_t len);
|
||||
static void w25q32_write(uint32_t addr, uint8_t *data, uint32_t len);
|
||||
static void w25q32_chip_erase(void);
|
||||
static void w25q32_write_enable(void);
|
||||
static void w25q32_write_disable(void);
|
||||
static uint8_t w25q32_read_status_reg(void);
|
||||
static void w25q32_wait_for_write_end(void);
|
||||
static void w25q32_sector_erase(uint32_t sector_addr);
|
||||
static void w25q32_block_erase(uint32_t block_addr);
|
||||
static void w25q32_page_write(uint32_t addr, uint8_t *data, uint16_t len);
|
||||
static uint8_t w25q32_read_id(void);
|
||||
static void w25q32_power_down(void);
|
||||
static void w25q32_wake_up(void);
|
||||
|
||||
/* w25q32 <20><><EFBFBD><EFBFBD>ʵ<EFBFBD><CAB5> */
|
||||
w25q32_t w25q32 = {
|
||||
.init = w25q32_init,
|
||||
.read = w25q32_read,
|
||||
.write = w25q32_write,
|
||||
.chip_erase = w25q32_chip_erase,
|
||||
};
|
||||
|
||||
|
||||
/* <20><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
static void w25q32_init(void) {
|
||||
W25Q32_CS_HIGH(); /* <20><>ʼʱƬѡ<C6AC><D1A1><EFBFBD><EFBFBD> */
|
||||
w25q32_wake_up(); /* <20><><EFBFBD><EFBFBD>оƬ */
|
||||
}
|
||||
|
||||
/* <20><>ȡоƬid */
|
||||
static uint8_t w25q32_read_id(void) {
|
||||
uint8_t id = 0;
|
||||
uint8_t cmd = W25Q32_JEDEC_ID;
|
||||
|
||||
W25Q32_CS_LOW();
|
||||
w25q32_spi_transmit(&cmd, 1);
|
||||
w25q32_spi_receive(&id, 1); /* <20><><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD> */
|
||||
w25q32_spi_receive(&id, 1);
|
||||
w25q32_spi_receive(&id, 1); /* <20>豸id<69>ڵ<EFBFBD><DAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD> */
|
||||
W25Q32_CS_HIGH();
|
||||
|
||||
return id;
|
||||
}
|
||||
|
||||
/* дʹ<D0B4><CAB9> */
|
||||
static void w25q32_write_enable(void) {
|
||||
uint8_t cmd = W25Q32_WRITE_ENABLE;
|
||||
|
||||
W25Q32_CS_LOW();
|
||||
w25q32_spi_transmit(&cmd, 1);
|
||||
W25Q32_CS_HIGH();
|
||||
}
|
||||
|
||||
/* д<><D0B4>ֹ */
|
||||
static void w25q32_write_disable(void) {
|
||||
uint8_t cmd = W25Q32_WRITE_DISABLE;
|
||||
|
||||
W25Q32_CS_LOW();
|
||||
w25q32_spi_transmit(&cmd, 1);
|
||||
W25Q32_CS_HIGH();
|
||||
}
|
||||
|
||||
/* <20><>ȡ״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
|
||||
static uint8_t w25q32_read_status_reg(void) {
|
||||
uint8_t status;
|
||||
uint8_t cmd = W25Q32_READ_STATUS_REG1;
|
||||
|
||||
W25Q32_CS_LOW();
|
||||
w25q32_spi_transmit(&cmd, 1);
|
||||
status = w25q32_spi_transmit_receive(0x00);
|
||||
W25Q32_CS_HIGH();
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/* <20>ȴ<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
static void w25q32_wait_for_write_end(void) {
|
||||
while (w25q32_read_status_reg() & W25Q32_STATUS_BUSY) {
|
||||
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>Ź<EFBFBD>ι<EFBFBD><CEB9> */
|
||||
}
|
||||
}
|
||||
|
||||
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> (4kb) */
|
||||
static void w25q32_sector_erase(uint32_t sector_addr) {
|
||||
uint8_t cmd[4];
|
||||
|
||||
/* ȷ<><C8B7><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>4k<34><6B><EFBFBD><EFBFBD> */
|
||||
sector_addr &= ~(W25Q32_SECTOR_SIZE - 1);
|
||||
|
||||
w25q32_write_enable();
|
||||
|
||||
cmd[0] = W25Q32_SECTOR_ERASE;
|
||||
cmd[1] = (sector_addr >> 16) & 0xFF;
|
||||
cmd[2] = (sector_addr >> 8) & 0xFF;
|
||||
cmd[3] = sector_addr & 0xFF;
|
||||
|
||||
W25Q32_CS_LOW();
|
||||
w25q32_spi_transmit(cmd, 4);
|
||||
W25Q32_CS_HIGH();
|
||||
|
||||
w25q32_wait_for_write_end();
|
||||
}
|
||||
|
||||
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> (64kb) */
|
||||
static void w25q32_block_erase(uint32_t block_addr) {
|
||||
uint8_t cmd[4];
|
||||
|
||||
/* ȷ<><C8B7><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>64k<34><6B><EFBFBD><EFBFBD> */
|
||||
block_addr &= ~(W25Q32_BLOCK_SIZE - 1);
|
||||
|
||||
w25q32_write_enable();
|
||||
|
||||
cmd[0] = W25Q32_BLOCK_ERASE_64K;
|
||||
cmd[1] = (block_addr >> 16) & 0xFF;
|
||||
cmd[2] = (block_addr >> 8) & 0xFF;
|
||||
cmd[3] = block_addr & 0xFF;
|
||||
|
||||
W25Q32_CS_LOW();
|
||||
w25q32_spi_transmit(cmd, 4);
|
||||
W25Q32_CS_HIGH();
|
||||
|
||||
w25q32_wait_for_write_end();
|
||||
}
|
||||
|
||||
/* <20><>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD> */
|
||||
static void w25q32_chip_erase(void) {
|
||||
uint8_t cmd = W25Q32_CHIP_ERASE;
|
||||
|
||||
w25q32_write_enable();
|
||||
|
||||
W25Q32_CS_LOW();
|
||||
w25q32_spi_transmit(&cmd, 1);
|
||||
W25Q32_CS_HIGH();
|
||||
|
||||
w25q32_wait_for_write_end();
|
||||
}
|
||||
|
||||
/* ҳд<D2B3><D0B4> (<28><><EFBFBD><EFBFBD>256<35>ֽ<EFBFBD>) */
|
||||
static void w25q32_page_write(uint32_t addr, uint8_t *data, uint16_t len) {
|
||||
uint8_t cmd[4];
|
||||
|
||||
if (len > W25Q32_PAGE_SIZE) {
|
||||
len = W25Q32_PAGE_SIZE;
|
||||
}
|
||||
|
||||
w25q32_write_enable();
|
||||
|
||||
cmd[0] = W25Q32_PAGE_PROGRAM;
|
||||
cmd[1] = (addr >> 16) & 0xFF;
|
||||
cmd[2] = (addr >> 8) & 0xFF;
|
||||
cmd[3] = addr & 0xFF;
|
||||
|
||||
W25Q32_CS_LOW();
|
||||
w25q32_spi_transmit(cmd, 4);
|
||||
w25q32_spi_transmit(data, len);
|
||||
W25Q32_CS_HIGH();
|
||||
|
||||
w25q32_wait_for_write_end();
|
||||
}
|
||||
|
||||
/* <20><><EFBFBD>ⳤ<EFBFBD><E2B3A4>д<EFBFBD><D0B4> */
|
||||
static void w25q32_write(uint32_t addr, uint8_t *data, uint32_t len) {
|
||||
uint32_t page_remaining;
|
||||
uint32_t offset = 0;
|
||||
|
||||
while (len > 0) {
|
||||
/* <20><><EFBFBD>㵱ǰҳʣ<D2B3><CAA3><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD> */
|
||||
page_remaining = W25Q32_PAGE_SIZE - (addr % W25Q32_PAGE_SIZE);
|
||||
|
||||
/* <20><><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>ij<EFBFBD><C4B3><EFBFBD> */
|
||||
uint32_t write_len = (len < page_remaining) ? len : page_remaining;
|
||||
|
||||
/* д<><D0B4>һҳ<D2BB><D2B3><EFBFBD><EFBFBD> */
|
||||
w25q32_page_write(addr, &data[offset], write_len);
|
||||
|
||||
/* <20><><EFBFBD>µ<EFBFBD>ַ<EFBFBD><D6B7>ƫ<EFBFBD><C6AB> */
|
||||
addr += write_len;
|
||||
offset += write_len;
|
||||
len -= write_len;
|
||||
}
|
||||
}
|
||||
|
||||
/* <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD> */
|
||||
static void w25q32_read(uint32_t addr, uint8_t *data, uint32_t len) {
|
||||
uint8_t cmd[4];
|
||||
|
||||
cmd[0] = W25Q32_READ_DATA;
|
||||
cmd[1] = (addr >> 16) & 0xFF;
|
||||
cmd[2] = (addr >> 8) & 0xFF;
|
||||
cmd[3] = addr & 0xFF;
|
||||
|
||||
W25Q32_CS_LOW();
|
||||
w25q32_spi_transmit(cmd, 4);
|
||||
w25q32_spi_receive(data, len);
|
||||
W25Q32_CS_HIGH();
|
||||
}
|
||||
|
||||
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ */
|
||||
static void w25q32_power_down(void) {
|
||||
uint8_t cmd = W25Q32_POWER_DOWN;
|
||||
|
||||
W25Q32_CS_LOW();
|
||||
w25q32_spi_transmit(&cmd, 1);
|
||||
W25Q32_CS_HIGH();
|
||||
}
|
||||
|
||||
/* <20><><EFBFBD><EFBFBD>оƬ */
|
||||
static void w25q32_wake_up(void) {
|
||||
uint8_t cmd = W25Q32_RELEASE_POWER_DOWN;
|
||||
|
||||
W25Q32_CS_LOW();
|
||||
w25q32_spi_transmit(&cmd, 1);
|
||||
W25Q32_CS_HIGH();
|
||||
HAL_Delay(5); /* <20>ȴ<EFBFBD>оƬ<D0BE><C6AC><EFBFBD><EFBFBD> */
|
||||
}
|
||||
|
||||
57
calib_board/usr/bsp/bsp_w25q.h
Normal file
57
calib_board/usr/bsp/bsp_w25q.h
Normal file
@@ -0,0 +1,57 @@
|
||||
#ifndef __BSP_W25Q_H__
|
||||
#define __BSP_W25Q_H__
|
||||
|
||||
#include "main.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* w25q32jvssiq <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
#define W25Q32_FLASH_SIZE (0x400000UL) /* 4mb = 32mb */
|
||||
#define W25Q32_PAGE_SIZE (256) /* ҳ<><D2B3>С */
|
||||
#define W25Q32_SECTOR_SIZE (4096) /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>С */
|
||||
#define W25Q32_BLOCK_SIZE (65536) /* <20><><EFBFBD><EFBFBD>С */
|
||||
|
||||
/* w25q32jvssiq <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
#define W25Q32_WRITE_ENABLE 0x06
|
||||
#define W25Q32_WRITE_DISABLE 0x04
|
||||
#define W25Q32_READ_STATUS_REG1 0x05
|
||||
#define W25Q32_WRITE_STATUS_REG 0x01
|
||||
#define W25Q32_READ_DATA 0x03
|
||||
#define W25Q32_FAST_READ 0x0B
|
||||
#define W25Q32_PAGE_PROGRAM 0x02
|
||||
#define W25Q32_SECTOR_ERASE 0x20
|
||||
#define W25Q32_BLOCK_ERASE_32K 0x52
|
||||
#define W25Q32_BLOCK_ERASE_64K 0xD8
|
||||
#define W25Q32_CHIP_ERASE 0xC7
|
||||
#define W25Q32_POWER_DOWN 0xB9
|
||||
#define W25Q32_RELEASE_POWER_DOWN 0xAB
|
||||
#define W25Q32_DEVICE_ID 0xAB
|
||||
#define W25Q32_MANUFACTURER_ID 0x90
|
||||
#define W25Q32_JEDEC_ID 0x9F
|
||||
|
||||
/* ״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD>λ */
|
||||
#define W25Q32_STATUS_BUSY (1 << 0)
|
||||
#define W25Q32_STATUS_WRITE_EN (1 << 1)
|
||||
|
||||
/* flash <20>洢<EFBFBD><E6B4A2><EFBFBD><EFBFBD> */
|
||||
#define W25Q32_USER_DATA_ADDR 0x000000 /* <20>û<EFBFBD><C3BB><EFBFBD><EFBFBD>ݴ洢<DDB4><E6B4A2>ʼ<EFBFBD><CABC>ַ */
|
||||
#define W25Q32_USER_DATA_SIZE 0x100000 /* <20><>Լ1mb<6D>ռ<EFBFBD><D5BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD> */
|
||||
|
||||
/* w25q32 <20><><EFBFBD><EFBFBD><EFBFBD>ṹ<EFBFBD><E1B9B9> */
|
||||
typedef struct {
|
||||
void (*init)(void);
|
||||
void (*read)(uint32_t addr, uint8_t *data, uint32_t len);
|
||||
void (*write)(uint32_t addr, uint8_t *data, uint32_t len);
|
||||
void (*chip_erase)(void);
|
||||
} w25q32_t;
|
||||
|
||||
/* ȫ<>ֶ<EFBFBD><D6B6><EFBFBD> */
|
||||
extern w25q32_t w25q32;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __BSP_W25Q_H__ */
|
||||
Reference in New Issue
Block a user